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Author SHA1 Message Date
Subv d480b63e0d MaxwellToGL: Added conversion functions for depth test and cull mode. 2018-07-02 13:31:49 -05:00
Subv c1f55c32c8 GPU: Added registers for depth test and cull mode. 2018-07-02 13:31:20 -05:00
Subv 0f929762b3 GPU: Implemented the Z24S8 depth format and load the depth framebuffer. 2018-07-02 12:42:04 -05:00
Subv f33e406ff2 GPU: Corrected the size of the MUFU subop field, and removed incorrect "min" operation. 2018-06-30 14:48:25 -05:00
Subv c0e2d52758 GPU: Implemented the RGBA32_UINT rendertarget format. 2018-06-30 14:23:13 -05:00
Subv b11072d54a GLCache: Specify the component type along the texture type in the format tuple. 2018-06-30 14:08:51 -05:00
Subv a3d82ef5d9 Build: Fixed some MSVC warnings in various parts of the code. 2018-06-20 11:39:10 -05:00
Subv 38989bef43 GPU: Perform negation after absolute value in the float shader instructions. 2018-06-18 19:56:29 -05:00
Subv eab7457c00 GPU: Don't mark uniform buffers and registers as used for instructions which don't have them. 
Like the MOV32I and FMUL32I instructions.
This fixes a potential crash when using these instructions.
 2018-06-18 19:50:35 -05:00
Subv 7786f41cc0 Qt: Removed the Registers widget. 
It was crashing and nobody actually uses this.
 2018-06-12 20:33:32 -05:00
Subv db0497b808 GPU: Implemented the iadd32i shader instruction. 2018-06-12 11:46:45 -05:00
Subv 987a170665 GPU: Partially implemented the Maxwell DMA engine. 
Only tiled->linear and linear->tiled copies that aren't offsetted are supported for now. Queries are not supported. Swizzled copies are not supported.
 2018-06-12 11:27:36 -05:00
Subv 004b1b3830 GPU: Convert the gl_InstanceId and gl_VertexID variables to floats when reading from them. 
This corrects the invalid position values in some games when doing attribute-less rendering.
 2018-06-10 13:50:19 -05:00
Subv 2a7653142d Rasterizer: Use UBOs instead of SSBOs for uploading const buffers. 
This should help a bit with GPU performance once we're GPU-bound.
 2018-06-09 18:02:05 -05:00
Subv b366b885a1 GPU: Implement the iset family of shader instructions. 2018-06-09 16:19:13 -05:00
Subv 3cb753eeb1 GPU: Added decodings for the ISET family of instructions. 2018-06-09 15:56:50 -05:00
Subv abec5f82e2 GPU: Stub the SSY shader instruction. 
This instruction tells the GPU where the flow reconverges in a non-uniform control flow scenario, we can ignore this when generating GLSL code.
 2018-06-08 22:46:10 -05:00
Subv c011b6f67e GPU: Synchronize the blend state on every draw call. 
Only independent blending on render target 0 is implemented for now.

This fixes the elongated squids in Splatoon 2's boot screen.
 2018-06-08 17:05:52 -05:00
Subv c712dafaee GPU: Added registers for normal and independent blending. 2018-06-08 17:04:41 -05:00
Subv 8d9534d830 GLCache: Align compressed texture sizes to their compression ratio, and then align that compressed size to the block height for tiled textures. 
This fixes issues with retrieving non-block-aligned tiled compressed textures from the cache.
 2018-06-08 12:27:19 -05:00
Subv 47dc5e0dab Rasterizer: Flush the written region when writing shader uniform data before copying it to the uniform buffers. 
This fixes the flip_viewport uniform having invalid values when drawing.
 2018-06-08 12:22:39 -05:00
Subv 86146ef819 GLRenderer: Write the shader stage configuration UBO data *before* copying it to the GPU. 
This should fix the bug with the vs_config UBO being uninitialized during shader execution.
 2018-06-07 08:33:23 -05:00
Subv f22e090b86 GLCache: Use the full uncompressed size when blitting from one texture to another. 
This avoids the problem of only copying a tiny piece of the textures when they are compressed.
 2018-06-06 23:26:36 -05:00
Subv 218a08df93 GLCache: Simplify the logic to copy from one texture to another in BlitTextures. 
We now use glCopyImageSubData, this should avoid errors with trying to attach a compressed texture as a framebuffer's color attachment and then blitting to it.

Maybe in the future we can change this to glCopyTextureSubImage which only requires GL_ARB_direct_state_access.
 2018-06-06 23:25:24 -05:00
Subv 47629c89a8 GPU: Support changing the texture swizzles for Maxwell textures. 2018-06-06 18:36:15 -05:00
Subv 89e81a9be2 GLState: Support changing the GL_TEXTURE_SWIZZLE parameter of each texture unit. 2018-06-06 18:36:13 -05:00
Subv dbfc39d214 GPU: Implement sampling multiple textures in the generated glsl shaders. 
All tested games that use a single texture show no regression.

Only Texture2D textures are supported right now, each shader gets its own "tex_fs/vs/gs" sampler array to maintain independent textures between shader stages, the textures themselves are reused if possible.
 2018-06-06 12:58:16 -05:00
Sebastian ValleandGitHub 2f842a86fe Merge pull request #529 from bunnei/am-nifm-stubs 
Stub SetConnectionConfirmationOption, GetPseudoDeviceId
 2018-06-06 08:29:12 -05:00
Sebastian ValleandGitHub ce026332a5 Merge pull request #531 from bunnei/fix-shl 
gl_shader_decompiler: Fix un/signed mismatch with SHL.
 2018-06-06 08:28:42 -05:00
Sebastian ValleandGitHub fa220dd709 Merge pull request #530 from bunnei/wrap-mirror 
maxwell_to_gl: Implement WrapMode Mirror.
 2018-06-06 08:28:27 -05:00
Subv adf47cd59a GPU: Allow the usage of RGBA16_FLOAT in the texture copy engine. 2018-06-05 22:01:20 -05:00
Subv c531a92eda GPU: Implemented the R11FG11FB10F texture and rendertarget formats. 2018-06-05 21:57:16 -05:00
Subv 14afc704d4 GPU: Fixed the compression factor for RGBA16F textures. 
They're not compressed.
 2018-06-05 21:55:17 -05:00
Subv 8d70d1ea45 GPU: Allow the usage of RGBA32_FLOAT in the texture copy engine. 2018-06-05 21:07:40 -05:00
Subv e7dfcdde74 GPU: Corrected the branch targets for the shader bra instruction. 2018-06-04 22:56:28 -05:00
Subv 4b89348c00 GPU: Implemented the F2I_R shader instruction. 2018-06-04 22:06:50 -05:00
Subv 23b1e6eded GPU: Implement the ISCADD shader instructions. 2018-06-04 20:17:41 -05:00
Subv 438a9b70cc GPU: Added decodings for the ISCADD instructions. 2018-06-04 20:17:39 -05:00
Subv 6cf6fa2842 GPU: Implement predicated exit instructions in the shader programs. 2018-06-04 19:18:11 -05:00
Subv d27279092f GPU: Take into account predicated exits when performing shader control flow analysis. 2018-06-04 19:14:23 -05:00
Subv 2933521a08 GPU: Use the bf bit in FSET to determine whether to write 0xFFFFFFFF or 1.0f. 2018-06-04 16:41:28 -05:00
Subv f6679ce422 GPU: Corrected the I2F_R implementation. 2018-06-04 16:41:27 -05:00
Subv 5d55403f94 GPU: Calculate the correct viewport dimensions based on the scale and translate registers. 
This is how nouveau calculates the viewport width and height. For some reason some games set 0xFFFF in the VIEWPORT_HORIZ and VIEWPORT_VERT registers, maybe those are a misnomer and actually refer to something else?
 2018-06-04 16:36:54 -05:00
Subv 0c688b421c GPU: Implemented the LOP32I instruction. 2018-06-04 13:56:31 -05:00
Subv cb47abecc6 GLCache: Corrected a mismatch between storing compressed sizes and verifying the uncompressed alignment in GetSurface. 2018-06-04 13:01:53 -05:00
Subv 90cddf1996 GPU: Use explicit types when retrieving the uniform values for fsetp/fset and isetp instead of the type of an invalid output register. 2018-06-04 11:22:26 -05:00
Subv 7c181fd4f4 GPU: Implemented the ISETP_R and ISETP_C shader instructions. 2018-06-04 11:12:03 -05:00
Subv b481d8a00d GPU: Partially implemented the shader BRA instruction. 2018-06-03 22:26:36 -05:00
Subv 06c72b4fcf GPU: Added decoding for the BRA instruction. 2018-06-03 22:14:00 -05:00
Subv d57333406d GPU: Partial implementation of long GPU queries. 
Long queries write a 128-bit result value to memory, which consists of a 64 bit query value and a 64 bit timestamp.

In this implementation, only select=Zero of the Crop unit is implemented, this writes the query sequence as a 64 bit value, and a 0u64 value for the timestamp, since we emulate an infinitely fast GPU.

This specific type was hwtested, but more rigorous tests should be performed in the future for the other types.
 2018-06-03 19:17:31 -05:00
Subv 9cd87a6352 Kernel/Threads: A thread waking up by timeout from a WaitProcessWideKey may already have an assigned lock owner. 
This situation may happen like so:
Thread 1 with low priority calls WaitProcessWideKey with timeout.
Thread 2 with high priority calls WaitProcessWideKey without timeout.
Thread 3 calls SignalProcessWideKey
- Thread 2 acquires the lock and awakens.
- Thread 1 can't acquire the lock and is put to sleep with the lock owner being Thread 2.
Thread 1's timeout expires, with the lock owner still being set to Thread 2.
 2018-06-02 14:06:35 -05:00
Subv 99f9d47d16 GPU: Implemented the DXN1 (BC4) texture format. 2018-06-02 13:17:09 -05:00
Subv c02d7c8ce7 Kernel/Thread: Corrected a typo that caused the affinity mask to never be changed. 2018-05-30 21:36:29 -05:00
Subv 3957b0c34e Kernel/SVC: Support special core values -2 and -3 in svcSetThreadCoreMask. 
Also added some proper error handling.
 2018-05-30 21:36:29 -05:00
Subv d1f9c750a6 Kernel/Thread: Corrected a typo in an assert about the processor id. 2018-05-30 11:32:46 -05:00
Subv 99f12b05fa Shaders: Implemented reading the gl_InstanceID and gl_VertexID variables in the vertex shader. 2018-05-30 10:58:03 -05:00
Sebastian ValleandGitHub 8df011a57f Merge pull request #483 from bunnei/sonic 
Several GPU fixes to boot Sonic Mania
 2018-05-30 07:31:46 -05:00
Subv 734106dcb9 GPU: Implemented the R8 texture format (0x1D) 2018-05-29 21:49:37 -05:00
Sebastian ValleandGitHub 9e30f5574f Merge pull request #471 from bunnei/fmnmx 
shader_bytecode: Implement other variants of FMNMX.
 2018-05-27 09:04:47 -05:00
Subv 7ddc872b52 GPU: Implemented the A1B5G5R5 texture format (0x14) 2018-05-27 09:02:05 -05:00
Subv e2cdf54177 Shader: Implemented compound predicates in fset. 
You can specify a predicate in the fset instruction:

Result = ((Value1 Comp Value2) OP P0) ? 1.0 : 0.0;
 2018-05-24 17:39:59 -05:00
Subv e2db7a83f6 GPU: Allow command lists to rebind a channel to another engine in the middle of the command list. 2018-05-24 17:32:46 -05:00
Subv 126270d963 Shader: Implemented compound predicates in fsetp. 
You can specify three predicates in an fsetp instruction:

P1 = (Value1 Comp Value2) OP P0;
P2 = !(Value1 Comp Value2) OP P0;
 2018-05-24 17:22:36 -05:00
Sebastian ValleandGitHub 882111c4f2 Merge pull request #453 from Subv/thread_callstack 
Qt/WaitTree: Display the callstack for each thread in the wait tree widget
 2018-05-20 20:01:08 -05:00
Sebastian ValleandGitHub 6486544e09 Merge pull request #452 from Subv/psetp 
ShadersDecompiler: Added decoding for the PSETP instruction.
 2018-05-20 20:00:55 -05:00
Sebastian ValleandGitHub 2dbfcd32d7 Merge pull request #451 from Subv/gl_array_size 
GLRenderer: Remove unused vertex buffer and increase the size of the stream buffer to 128 MB.
 2018-05-20 20:00:40 -05:00
Subv 8440cef223 Shaders: Implemented the FMNMX shader instruction. 2018-05-20 17:53:06 -05:00
Subv fd500d3da6 Mutex: Do not assert when the mutex waiting threads list isn't empty on mutex release. 
A thread may own multiple mutexes at the same time, and only release one of them while other threads are waiting for the other mutexes.
 2018-05-20 14:41:58 -05:00
Subv 525492428d GPU: Implemented the nvmap Free ioctl. 
It releases a reference to an nvmap object
 2018-05-20 14:25:57 -05:00
Subv 72b5c448cf GPU: Implemented nvhost-as-gpu's UnmapBuffer ioctl. 
It removes a mapping previously created with the MapBufferEx ioctl.
 2018-05-20 14:25:56 -05:00
Sebastian ValleandGitHub 03388c3071 Merge pull request #450 from Subv/shader_link_error 
GLRenderer: Log the shader source code when program linking fails.
 2018-05-20 12:57:32 -05:00
Sebastian ValleandGitHub 353e1dd7e4 Merge pull request #443 from ogniK5377/ipc-500 
Added IPC RequestWithContext & ControlWithContext
 2018-05-19 17:03:30 -05:00
Sebastian ValleandGitHub dc26601860 Merge pull request #442 from Hexagon12/nfp-service-names 
Updated nfp to have more service names
 2018-05-19 17:01:23 -05:00
Subv 2a35a36251 Kernel/SVC: Signal the highest priority threads first in svcSignalProcessWideKey. 2018-05-19 16:58:30 -05:00
Subv c74f2555b6 Kernel/Threads: Reschedule the proper core when operating on that core's threads. 2018-05-19 16:57:44 -05:00
Subv fab3dd98fe SVC: Removed unused WaitSynchronization1 function 2018-05-19 16:56:33 -05:00
Subv c50393e066 Qt/WaitTree: Display the callstack for each thread in the wait tree widget. 2018-05-19 16:52:49 -05:00
Subv a056d5ad8c ShadersDecompiler: Added decoding for the PSETP instruction. 2018-05-19 11:41:14 -05:00
Subv 98b143c2d6 GLRenderer: Remove unused hw_vao_enabled_attributes variable. 2018-05-19 11:36:38 -05:00
Subv 370ab5df9b GLRenderer: Remove unused vertex buffer and increase the size of the stream buffer to 128 MB. 
The stream buffer is where all the vertex data is copied, some games require this to be much bigger than the 4 MB we used to have.
 2018-05-19 11:36:09 -05:00
Subv 21959ddfef GLRenderer: Log the shader source code when program linking fails. 2018-05-19 11:19:34 -05:00
Subv 0c8b7c00e8 GPU: Don't write to invalid memory locations when handling ioctls that don't have an output. 2018-05-01 14:54:15 -05:00
Subv da32c648bf Shaders: Implemented predicate condition 3 (LessEqual) in the fset and fsetp instructions. 2018-04-29 12:49:41 -05:00
Sebastian ValleandGitHub faa431b274 Merge pull request #418 from bunnei/copy-block-height 
fermi_2d: Fix surface copy block height.
 2018-04-29 09:49:33 -05:00
Subv 20d86d8a36 GPU: Partially implemented the Fermi2D surface copy operation. 
The hardware allows for some rather complicated operations to be performed on the data during the copy, this is not implemented.
Only same-format same-size raw copies are implemented for now.
 2018-04-25 12:54:26 -05:00
Subv e9ad8e9185 Shaders: Added bit decodings for the I2I instruction. 2018-04-25 12:52:55 -05:00
Subv 1740aa5444 Shaders: Implemented the FSET instruction. 
This instruction is similar to the FSETP instruction, but it doesn't set a predicate, it sets the destination register to 1.0 if the condition holds, and 0 otherwise.
 2018-04-25 12:52:32 -05:00
Subv 5ab597041f Memory: Added a missing shortcut for Memory::CopyBlock for the current process. 2018-04-25 11:55:30 -05:00
Subv 1dd4861d38 GPU: Make the Textures::CopySwizzledData function accessible from the outside of the file. 2018-04-25 11:55:30 -05:00
Subv a6da2b93c1 GPU: Added a function to retrieve the bytes per pixel of the render target formats. 2018-04-25 11:55:29 -05:00
Subv 378c881427 GPU: Added surface copy registers to Fermi2D 2018-04-25 11:55:29 -05:00
Subv b1109931b9 GPU: Added boilerplate code for the Fermi2D engine 2018-04-25 11:55:29 -05:00
Subv c16cfbbc6c GPU: Reduce the number of registers of Maxwell3D to 0xE00. 
The rest are just macro shim registers.
 2018-04-25 11:55:28 -05:00
Subv a994446b6e GPU: Move the Maxwell3D macro uploading code to the inside of the Maxwell3D processor. 
It doesn't belong in the PFIFO handler.
 2018-04-25 11:55:27 -05:00
Subv e2f2a49d2d GPU: Corrected the upper bound of the PFIFO method ids in the command processor. 2018-04-25 11:53:54 -05:00
Subv 0369ee7248 Shaders: Added decodings for the FSET instructions. 2018-04-24 22:42:54 -05:00
Subv f208953585 GPU: Added asserts to our code for handling the QUERY_GET GPU command. 
This is based on research from nouveau. Many things are currently unknown and will require hwtests in the future.
This commit also stubs QueryMode::Write2 to do the same as Write. Nouveau code treats them interchangeably, it is currently unknown what the difference is.
 2018-04-23 17:06:57 -05:00
Subv 9531a29283 GPU: Support multiple enabled vertex arrays. 
The vertex arrays will be copied to the stream buffer one after the other, and the attributes will be set using the ARB_vertex_attrib_binding extension.

yuzu now thus requires OpenGL 4.3 or the ARB_vertex_attrib_binding extension.
 2018-04-23 11:34:50 -05:00
Subv 46572d027d Kernel: Implemented mutex priority inheritance. 
Verified with a hwtest and implemented based on reverse engineering.

Thread A's priority will get bumped to the highest priority among all the threads that are waiting for a mutex that A holds.
Once A releases the mutex and ownership is transferred to B, A's priority will return to normal and B's priority will be bumped.
 2018-04-23 11:23:44 -05:00
Subv 0d6eafe11a NvDrv/nvhost-as-gpu: Ensure that the object passed to MapBufferEx has already been allocated. 
Also added a consistency check and a comment for the case when the object id is different than its handle. The real nvservices doesn't make a distinction between ids and handles, each object gets an unique handle which doubles as its id.
 2018-04-23 11:21:46 -05:00