arm64 detect marcos

tier0/cpu.cpp

@@ -22,7 +22,7 @@ const tchar* GetProcessorVendorId();
 
 static bool cpuid(unsigned long function, unsigned long& out_eax, unsigned long& out_ebx, unsigned long& out_ecx, unsigned long& out_edx)
 {
-#if defined (__arm__) || defined( _X360 )
+#if defined (__arm__) || defined (__arm64__) || defined( _X360 )
 	return false;
 #elif defined(GNUC)
 	asm("mov %%ebx, %%esi\n\t"

tier0/cpu_posix.cpp

@@ -99,6 +99,15 @@ uint64 GetCPUFreqFromPROC()
 
 uint64 CalculateCPUFreq()
 {
+#ifdef __APPLE__
+    uint64 freq_hz = 0;
+    size_t freq_size = sizeof(freq_hz);
+    int retval = sysctlbyname("hw.cpufrequency_max", &freq_hz, &freq_size, NULL, 0);
+    // MoeMod : TODO dont know how to get freq on Apple Silicon
+    if(!freq_hz)
+        freq_hz = 3200000;
+    return freq_hz;
+#else
 	// Try to open cpuinfo_max_freq. If the kernel was built with cpu scaling support disabled, this will fail.
 	FILE *fp = fopen( "/sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_max_freq", "r" );
 	if ( fp )
@@ -118,8 +127,9 @@ uint64 CalculateCPUFreq()
 			return retVal * 1000;
 		}
 	}
+#endif
 
-#ifndef __arm__
+#if !defined(__arm__) && !defined(__arm64__)
 	// Compute the period. Loop until we get 3 consecutive periods that
 	// are the same to within a small error. The error is chosen
 	// to be +/- 0.02% on a P-200.