fix address sanitizer issues #2

This commit is contained in:
nillerusr 2022-05-01 20:08:32 +03:00
parent ce68fffa3b
commit 61cd8d0afc
27 changed files with 119 additions and 91 deletions

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@ -109,7 +109,7 @@ private:
void audioRecordingCallback( void *userdata, uint8 *stream, int len )
{
VoiceRecord_SDL *voice = (VoiceRecord_SDL*)userdata;
voice->RenderBuffer( stream, len );
voice->RenderBuffer( (char*)stream, len );
}
VoiceRecord_SDL::VoiceRecord_SDL() :

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@ -2751,7 +2751,7 @@ void CL_InitLanguageCvar()
else if( szLang )
{
ELanguage lang = PchLanguageICUCodeToELanguage(szLang, k_Lang_English);
char *szShortLang = GetLanguageShortName(lang);
const char *szShortLang = GetLanguageShortName(lang);
cl_language.SetValue( szShortLang );
}
else

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@ -1816,14 +1816,14 @@ void CClientState::FinishSignonState_New()
//
// This is pretty janky, but doesn't really have any cost (and even makes our one-frozen-frame load screen slightly
// less likely to trigger OS "not responding" warnings)
extern void V_RenderVGuiOnly();
V_RenderVGuiOnly();
// extern void V_RenderVGuiOnly();
// V_RenderVGuiOnly();
// Before we do anything with the whitelist, make sure we have the proper map pack mounted
// this will load the .bsp by setting the world model the string list at the hardcoded index 1.
cl.SetModel( 1 );
V_RenderVGuiOnly();
//V_RenderVGuiOnly();
// Check for a new whitelist. It's good to do it early in the connection process here because if we wait until later,
// the client may have loaded some files w/o the proper whitelist restrictions and we'd have to reload them.

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@ -865,6 +865,7 @@ CConPanel::CConPanel( vgui::Panel *parent ) : CBasePanel( parent, "CConPanel" )
//-----------------------------------------------------------------------------
CConPanel::~CConPanel( void )
{
g_pConPanel = NULL;
}
void CConPanel::Con_NPrintf( int idx, const char *msg )

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@ -1289,7 +1289,7 @@ public:
SaveMsg( "DirectoryCopy: AsyncAppend %s, %s\n", szName, pDestFileName );
g_pFileSystem->AsyncAppend( pDestFileName, memcpy( new char[MAX_PATH], list[i].szFileName, MAX_PATH), MAX_PATH, true ); // Filename can only be as long as a map name + extension
g_pFileSystem->AsyncAppend( pDestFileName, new int(fileSize), sizeof(int), true );
g_pFileSystem->AsyncAppend( pDestFileName, memcpy( new char[sizeof(int)], &fileSize, sizeof(int)), sizeof(int), true );
g_pFileSystem->AsyncAppendFile( pDestFileName, szName );
}
}

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@ -2071,11 +2071,11 @@ public:
private:
static const Vector m_pNormal;
static Vector m_pNormal;
static float m_Dist;
};
const Vector CClipPlane::m_pNormal;
Vector CClipPlane::m_pNormal;
float CClipPlane::m_Dist;
static inline void ClampTexCoord( ShadowVertex_t *pInVertex, ShadowVertex_t *pOutVertex )

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@ -18,6 +18,8 @@
class CMaterial_QueueFriendly : public IMaterialInternal //wraps a CMaterial with queue friendly functions for game/engine code. materialsystem/shaderapi code should use CMaterial directly.
{
public:
CMaterial_QueueFriendly() : m_pRealTimeVersion(NULL) {}
virtual const char * GetName() const;
virtual const char * GetTextureGroupName() const;
virtual PreviewImageRetVal_t GetPreviewImageProperties( int *width, int *height, ImageFormat *imageFormat, bool* isTranslucent ) const;

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@ -6301,27 +6301,16 @@ int CShaderAPIDx8::GetCurrentDynamicVBSize( void )
FORCEINLINE void CShaderAPIDx8::SetVertexShaderConstantInternal( int var, float const* pVec, int numVecs, bool bForce )
{
Assert( numVecs > 0 );
Assert( pVec );
// DX8 asm shaders use a constant mapping which has transforms and vertex shader
// specific constants shifted down by 10 constants (two 5-constant light structures)
if ( IsPC() )
if ( IsPC() || IsPS3() )
{
if ( (g_pHardwareConfig->Caps().m_nDXSupportLevel < 90) && (var >= VERTEX_SHADER_MODULATION_COLOR) )
{
var -= 10;
}
Assert( var + numVecs <= g_pHardwareConfig->NumVertexShaderConstants() );
if ( !bForce )
{
int skip = 0;
numVecs = AdjustUpdateRange( pVec, &m_DesiredState.m_pVectorVertexShaderConstant[var], numVecs, &skip );
if ( !numVecs )
return;
var += skip;
pVec += skip * 4;
}
if ( !bForce && memcmp( pVec, &m_DynamicState.m_pVectorVertexShaderConstant[var], numVecs * 4 * sizeof( float ) ) == 0 )
return;
Dx9Device()->SetVertexShaderConstantF( var, pVec, numVecs );
memcpy( &m_DynamicState.m_pVectorVertexShaderConstant[var], pVec, numVecs * 4 * sizeof(float) );
}
@ -6330,12 +6319,10 @@ FORCEINLINE void CShaderAPIDx8::SetVertexShaderConstantInternal( int var, float
Assert( var + numVecs <= g_pHardwareConfig->NumVertexShaderConstants() );
}
memcpy( &m_DesiredState.m_pVectorVertexShaderConstant[var], pVec, numVecs * 4 * sizeof(float) );
if ( IsX360() && var + numVecs > m_MaxVectorVertexShaderConstant )
m_MaxVectorVertexShaderConstant = var + numVecs;
if ( IsX360() )
{
m_MaxVectorVertexShaderConstant = max( m_MaxVectorVertexShaderConstant, var + numVecs );
}
memcpy( &m_DesiredState.m_pVectorVertexShaderConstant[var], pVec, numVecs * 4 * sizeof(float) );
}
@ -6417,29 +6404,40 @@ FORCEINLINE void CShaderAPIDx8::SetPixelShaderConstantInternal( int nStartConst,
{
Assert( nStartConst + nNumConsts <= g_pHardwareConfig->NumPixelShaderConstants() );
if ( IsPC() )
if ( IsPC() || IsPS3() )
{
if ( ! bForce )
if ( !bForce )
{
int skip = 0;
nNumConsts = AdjustUpdateRange( pValues, &m_DesiredState.m_pVectorPixelShaderConstant[nStartConst], nNumConsts, &skip );
DWORD* pSrc = (DWORD*)pValues;
DWORD* pDst = (DWORD*)&m_DesiredState.m_pVectorPixelShaderConstant[nStartConst];
while( nNumConsts && ( pSrc[0] == pDst[0] ) && ( pSrc[1] == pDst[1] ) && ( pSrc[2] == pDst[2] ) && ( pSrc[3] == pDst[3] ) )
{
pSrc += 4;
pDst += 4;
nNumConsts--;
nStartConst++;
}
if ( !nNumConsts )
return;
nStartConst += skip;
pValues += skip * 4;
pValues = reinterpret_cast< float const * >( pSrc );
}
Dx9Device()->SetPixelShaderConstantF( nStartConst, pValues, nNumConsts );
memcpy( &m_DynamicState.m_pVectorPixelShaderConstant[nStartConst], pValues, nNumConsts * 4 * sizeof(float) );
}
memcpy( &m_DesiredState.m_pVectorPixelShaderConstant[nStartConst], pValues, nNumConsts * 4 * sizeof(float) );
if ( IsX360() )
if ( IsX360() && nStartConst + nNumConsts > m_MaxVectorPixelShaderConstant )
{
m_MaxVectorPixelShaderConstant = max( m_MaxVectorPixelShaderConstant, nStartConst + nNumConsts );
m_MaxVectorPixelShaderConstant = nStartConst + nNumConsts;
Assert( m_MaxVectorPixelShaderConstant <= 32 );
if ( m_MaxVectorPixelShaderConstant > 32 )
{
// NOTE! There really are 224 pixel shader constants on the 360, but we do an optimization that only blasts the first 32 always.
Error( "Don't use more then the first 32 pixel shader constants on the 360!" );
}
}
memcpy( &m_DesiredState.m_pVectorPixelShaderConstant[nStartConst], pValues, nNumConsts * 4 * sizeof(float) );
}
void CShaderAPIDx8::SetPixelShaderConstant( int var, float const* pVec, int numVecs, bool bForce )

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@ -562,7 +562,7 @@ void CShaderDeviceMgrDx8::CheckVendorDependentAlphaToCoverage( HardwareCaps_t *p
ConVar mat_hdr_level( "mat_hdr_level", "2", FCVAR_ARCHIVE );
ConVar mat_slopescaledepthbias_shadowmap( "mat_slopescaledepthbias_shadowmap", "16", FCVAR_CHEAT );
#ifdef DX_TO_GL_ABSTRACTION
ConVar mat_depthbias_shadowmap( "mat_depthbias_shadowmap", "20", FCVAR_CHEAT | FCVAR_DEVELOPMENTONLY );
ConVar mat_depthbias_shadowmap( "mat_depthbias_shadowmap", "40", FCVAR_CHEAT );
#else
ConVar mat_depthbias_shadowmap( "mat_depthbias_shadowmap", "0.0005", FCVAR_CHEAT );
#endif

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@ -198,7 +198,7 @@ BEGIN_VS_SHADER_FLAGS( DepthWrite, "Help for Depth Write", SHADER_NOT_EDITABLE )
vParms.y = 4000.0f; // arbitrary far
vParms.z = 0.0f;
vParms.w = 0.0f;
pShaderAPI->SetPixelShaderConstant( 1, vParms.Base(), 2 );
pShaderAPI->SetPixelShaderConstant( 1, vParms.Base(), 1 );
} // DYNAMIC_STATE

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@ -132,15 +132,16 @@ BEGIN_VS_SHADER_FLAGS( ParticleSphere_DX9, "Help for BumpmappedEnvMap", SHADER_N
// (It does this by seeing if the intensity*1/distSqr is > 1. If so, then it scales it so
// it is equal to 1).
const float *f = params[LIGHT_COLOR]->GetVecValue();
Vector vLightColor( f[0], f[1], f[2] );
Vector4D vLightColor( f[0], f[1], f[2], 0.f );
float flScale = max( vLightColor.x, max( vLightColor.y, vLightColor.z ) );
if ( flScale < 0.01f )
flScale = 0.01f;
float vScaleVec[3] = { flScale, flScale, flScale };
Vector4D vScaleVec = { flScale, flScale, flScale, 0.f };
vLightColor /= flScale;
pShaderAPI->SetVertexShaderConstant( VERTEX_SHADER_SHADER_SPECIFIC_CONST_1, vLightColor.Base() );
pShaderAPI->SetVertexShaderConstant( VERTEX_SHADER_SHADER_SPECIFIC_CONST_2, vScaleVec );
pShaderAPI->SetVertexShaderConstant( VERTEX_SHADER_SHADER_SPECIFIC_CONST_2, vScaleVec.Base() );
pShaderAPI->SetPixelShaderFogParams( PSREG_FOG_PARAMS );

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@ -635,14 +635,18 @@ bool IsOBBIntersectingOBB( const Vector &vecOrigin1, const QAngle &vecAngles1, c
}
// NOTE: This is only very slightly faster on high end PCs and x360
#ifdef __SANITIZE_ADDRESS__
#define USE_SIMD_RAY_CHECKS 0
#else
#define USE_SIMD_RAY_CHECKS 1
#endif
//-----------------------------------------------------------------------------
// returns true if there's an intersection between box and ray
//-----------------------------------------------------------------------------
bool FASTCALL IsBoxIntersectingRay( const Vector& boxMin, const Vector& boxMax,
const Vector& origin, const Vector& vecDelta, float flTolerance )
{
#if USE_SIMD_RAY_CHECKS
// Load the unaligned ray/box parameters into SIMD registers
fltx4 start = LoadUnaligned3SIMD(origin.Base());
@ -695,7 +699,7 @@ bool FASTCALL IsBoxIntersectingRay( const Vector& boxMin, const Vector& boxMax,
return IsAllZeros(separation);
#else
// On the x360, we force use of the SIMD functions.
#if defined(_X360)
#if defined(_X360)
if (IsX360())
{
fltx4 delta = LoadUnaligned3SIMD(vecDelta.Base());
@ -766,7 +770,7 @@ bool FASTCALL IsBoxIntersectingRay( const Vector& boxMin, const Vector& boxMax,
bool FASTCALL IsBoxIntersectingRay( const Vector& boxMin, const Vector& boxMax,
const Vector& origin, const Vector& vecDelta,
const Vector& vecInvDelta, float flTolerance )
{
{
#if USE_SIMD_RAY_CHECKS
// Load the unaligned ray/box parameters into SIMD registers
fltx4 start = LoadUnaligned3SIMD(origin.Base());

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@ -431,7 +431,7 @@ public:
{
for ( int i = 0; i < m_Names.Count(); i++ )
{
delete m_Names[i];
delete[] m_Names[i];
}
}

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@ -429,7 +429,7 @@ void CDispCollTree::AABBTree_CreateLeafs( void )
}
}
void CDispCollTree::AABBTree_GenerateBoxes_r( int nodeIndex, Vector *pMins, Vector *pMaxs )
void __attribute__((no_sanitize("address"))) CDispCollTree::AABBTree_GenerateBoxes_r( int nodeIndex, Vector *pMins, Vector *pMaxs )
{
// leaf
ClearBounds( *pMins, *pMaxs );

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@ -195,9 +195,7 @@ inline ConCommandBase * ICvar::Iterator::Get( void )
// don't have to include tier1.h
//-----------------------------------------------------------------------------
// These are marked DLL_EXPORT for Linux.
DLL_EXPORT ICvar *cvar;
extern ICvar *cvar;
extern ICvar *g_pCVar;
#endif // ICVAR_H

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@ -23,7 +23,7 @@
#define USE_STDC_FOR_SIMD 0
#endif
#if (!defined (__arm__) && !defined(_X360) && (USE_STDC_FOR_SIMD == 0))
#if !(defined(_X360) && (USE_STDC_FOR_SIMD == 0))
#define _SSE1 1
#endif

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@ -83,7 +83,7 @@ Studio models are position independent, so the cache manager can move them.
#define MAXSTUDIOFLEXDESC 1024 // maximum number of low level flexes (actual morph targets)
#define MAXSTUDIOFLEXCTRL 96 // maximum number of flexcontrollers (input sliders)
#define MAXSTUDIOPOSEPARAM 24
#define MAXSTUDIOBONECTRLS 4
#define MAXSTUDIOBONECTRLS 5
#define MAXSTUDIOANIMBLOCKS 256
#define MAXSTUDIOBONEBITS 7 // NOTE: MUST MATCH MAXSTUDIOBONES

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@ -1182,7 +1182,11 @@ private:
class ALIGN8 PLATFORM_CLASS CThreadSpinRWLock
{
public:
CThreadSpinRWLock() { COMPILE_TIME_ASSERT( sizeof( LockInfo_t ) == sizeof( int64 ) ); Assert( (intp)this % 8 == 0 ); memset( this, 0, sizeof( *this ) ); }
CThreadSpinRWLock()
{
COMPILE_TIME_ASSERT( sizeof( LockInfo_t ) == sizeof( int64 ) );
Assert( (intp)this % 8 == 0 );
}
bool TryLockForWrite();
bool TryLockForRead();
@ -1200,11 +1204,18 @@ public:
void UnlockWrite() const { const_cast<CThreadSpinRWLock *>(this)->UnlockWrite(); }
private:
struct LockInfo_t
{
LockInfo_t(uint32 thread_id = 0, int readers = 0)
{
uint32 m_writerId;
int m_nReaders;
};
m_writerId = thread_id;
m_nReaders = readers;
}
uint32 m_writerId;
int m_nReaders;
};
bool AssignIf( const LockInfo_t &newValue, const LockInfo_t &comperand );
bool TryLockForWrite( const uint32 threadId );
@ -1751,8 +1762,8 @@ inline bool CThreadSpinRWLock::TryLockForWrite( const uint32 threadId )
return false;
}
static const LockInfo_t oldValue = { 0, 0 };
LockInfo_t newValue = { threadId, 0 };
static const LockInfo_t oldValue( 0, 0 );
LockInfo_t newValue( threadId, 0 );
const bool bSuccess = AssignIf( newValue, oldValue );
#if defined(_X360)
if ( bSuccess )

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@ -231,7 +231,7 @@ public:
#endif
}
TSLNodeBase_t *Pop()
__attribute__((no_sanitize("address"))) TSLNodeBase_t *Pop()
{
#ifdef USE_NATIVE_SLIST
#ifdef _X360

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@ -30,8 +30,7 @@ class IProcessUtils;
// allowing link libraries to access tier1 library interfaces
//-----------------------------------------------------------------------------
// These are marked DLL_EXPORT for Linux.
DLL_EXPORT ICvar *cvar;
extern ICvar *cvar;
extern ICvar *g_pCVar;
extern IProcessUtils *g_pProcessUtils;

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@ -142,9 +142,9 @@ static bool IsWin98OrOlder()
static bool CheckSSETechnology(void)
{
#if defined( __ARM__ )
#if defined(__SANITIZE_ADDRESS__)
return false;
#elif defined( _X360 ) || defined( _PS3 )
#elif defined( _X360 ) || defined( _PS3 ) || defined (__arm__)
return true;
#else
if ( IsWin98OrOlder() ) {
@ -162,8 +162,10 @@ static bool CheckSSETechnology(void)
static bool CheckSSE2Technology(void)
{
#if defined( _X360 ) || defined( _PS3 )
#if defined( _X360 ) || defined( _PS3 ) || defined(__SANITIZE_ADDRESS__)
return false;
#elif defined (__arm__)
return true;
#else
unsigned long eax,ebx,edx,unused;
if ( !cpuid(1,eax,ebx,unused,edx) )
@ -175,8 +177,10 @@ static bool CheckSSE2Technology(void)
bool CheckSSE3Technology(void)
{
#if defined( _X360 ) || defined( _PS3 )
#if defined( _X360 ) || defined( _PS3 ) || defined(__SANITIZE_ADDRESS__)
return false;
#elif defined (__arm__)
return true;
#else
unsigned long eax,ebx,edx,ecx;
if( !cpuid(1,eax,ebx,ecx,edx) )
@ -188,8 +192,10 @@ bool CheckSSE3Technology(void)
bool CheckSSSE3Technology(void)
{
#if defined( _X360 ) || defined( _PS3 )
#if defined( _X360 ) || defined( _PS3 ) || defined(__SANITIZE_ADDRESS__)
return false;
#elif defined (__arm__)
return true;
#else
// SSSE 3 is implemented by both Intel and AMD
// detection is done the same way for both vendors
@ -203,8 +209,10 @@ bool CheckSSSE3Technology(void)
bool CheckSSE41Technology(void)
{
#if defined( _X360 ) || defined( _PS3 )
#if defined( _X360 ) || defined( _PS3 ) || defined(__SANITIZE_ADDRESS__)
return false;
#elif defined (__arm__)
return true;
#else
// SSE 4.1 is implemented by both Intel and AMD
// detection is done the same way for both vendors
@ -219,8 +227,10 @@ bool CheckSSE41Technology(void)
bool CheckSSE42Technology(void)
{
#if defined( _X360 ) || defined( _PS3 )
#if defined( _X360 ) || defined( _PS3 ) || defined(__SANITIZE_ADDRESS__)
return false;
#elif defined (__arm__)
return true;
#else
// SSE4.2 is an Intel-only feature
@ -239,8 +249,10 @@ bool CheckSSE42Technology(void)
bool CheckSSE4aTechnology( void )
{
#if defined( _X360 ) || defined( _PS3 )
#if defined( _X360 ) || defined( _PS3 ) || defined(__SANITIZE_ADDRESS__)
return false;
#elif defined (__arm__)
return true;
#else
// SSE 4a is an AMD-only feature
@ -259,7 +271,7 @@ bool CheckSSE4aTechnology( void )
static bool Check3DNowTechnology(void)
{
#if defined( _X360 ) || defined( _PS3 )
#if defined( _X360 ) || defined( _PS3 ) || defined (__arm__) || defined(__SANITIZE_ADDRESS__)
return false;
#else
unsigned long eax, unused;
@ -279,7 +291,7 @@ static bool Check3DNowTechnology(void)
static bool CheckCMOVTechnology()
{
#if defined( _X360 ) || defined( _PS3 )
#if defined( _X360 ) || defined( _PS3 ) || defined (__arm__) || defined(__SANITIZE_ADDRESS__)
return false;
#else
unsigned long eax,ebx,edx,unused;
@ -292,7 +304,7 @@ static bool CheckCMOVTechnology()
static bool CheckFCMOVTechnology(void)
{
#if defined( _X360 ) || defined( _PS3 )
#if defined( _X360 ) || defined( _PS3 ) || defined (__arm__) || defined(__SANITIZE_ADDRESS__)
return false;
#else
unsigned long eax,ebx,edx,unused;
@ -305,7 +317,7 @@ static bool CheckFCMOVTechnology(void)
static bool CheckRDTSCTechnology(void)
{
#if defined( _X360 ) || defined( _PS3 )
#if defined( _X360 ) || defined( _PS3 ) || defined (__arm__) || defined(__SANITIZE_ADDRESS__)
return false;
#else
unsigned long eax,ebx,edx,unused;
@ -321,11 +333,13 @@ const tchar* GetProcessorVendorId()
{
#if defined( _X360 ) || defined( _PS3 )
return "PPC";
#elif defined ( __arm__ )
return "ARM";
#else
unsigned long unused, VendorIDRegisters[3];
static tchar VendorID[13];
memset( VendorID, 0, sizeof(VendorID) );
if ( !cpuid(0,unused, VendorIDRegisters[0], VendorIDRegisters[2], VendorIDRegisters[1] ) )
{
@ -375,7 +389,7 @@ static bool HTSupported(void)
// Check to see if this is a Pentium 4 or later processor
if (((reg_eax & FAMILY_ID) == PENTIUM4_ID) || (reg_eax & EXT_FAMILY_ID))
if (vendor_id[0] == 'uneG' && vendor_id[1] == 'Ieni' && vendor_id[2] == 'letn')
if (vendor_id[0] == 0x756E6547 && vendor_id[1] == 0x49656E69 && vendor_id[2] == 0x6C65746E)
return (reg_edx & HT_BIT) != 0; // Genuine Intel Processor with Hyper-Threading Technology
return false; // This is not a genuine Intel processor.
@ -391,7 +405,7 @@ static uint8 LogicalProcessorsPerPackage(void)
// EBX[23:16] indicate number of logical processors per package
const unsigned NUM_LOGICAL_BITS = 0x00FF0000;
unsigned long unused, reg_ebx = 0;
unsigned long unused, reg_ebx = 0;
if ( !HTSupported() )
return 1;

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@ -1516,7 +1516,7 @@ void CVProfile::Term()
{
delete [] m_pBudgetGroups[i].m_pName;
}
delete m_pBudgetGroups;
delete[] m_pBudgetGroups;
m_nBudgetGroupNames = m_nBudgetGroupNamesAllocated = 0;
m_pBudgetGroups = NULL;

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@ -6,12 +6,16 @@
// $NoKeywords: $
//=============================================================================//
#if defined (__arm__)
#if defined __SANITIZE_ADDRESS__
bool CheckMMXTechnology(void) { return false; }
bool CheckSSETechnology(void) { return false; }
bool CheckSSE2Technology(void) { return false; }
bool Check3DNowTechnology(void) { return false; }
#elif defined (__arm__)
bool CheckMMXTechnology(void) { return true; }
bool CheckSSETechnology(void) { return true; }
bool CheckSSE2Technology(void) { return true; }
bool Check3DNowTechnology(void) { return false; }
#else
#define cpuid(in,a,b,c,d) \

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@ -1788,14 +1788,14 @@ void GLMContext::PreloadTex( CGLMTex *tex, bool force )
0.0f, 0.0f, 0.0f,
0.0f, 0.0f, 0.0f };
static int indices[] = { 0, 1, 2 };
static short indices[] = { 0, 1, 2 };
gGL->glEnableVertexAttribArray( 0 );
gGL->glVertexAttribPointer( 0, 3, GL_FLOAT, 0, 0, posns );
gGL->glDrawRangeElements( GL_TRIANGLES, 0, 3, 3, GL_UNSIGNED_INT, indices);
gGL->glDrawRangeElements( GL_TRIANGLES, 0, 2, 3, GL_UNSIGNED_SHORT, indices);
gGL->glDisableVertexAttribArray( 0 );

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@ -647,8 +647,6 @@ void CPhysicsObject::SetInertia( const Vector &inertia )
ri.k[1] = IVP_Inline_Math::fabsd(ri.k[1]);
ri.k[2] = IVP_Inline_Math::fabsd(ri.k[2]);
if( ri.k[0] > 1e14f ) ri.k[0] = 1e14f; if( ri.k[1] > 1e14f ) ri.k[1] = 1e14f; if( ri.k[2] > 1e14f ) ri.k[2] = 1e14f;
m_pObject->get_core()->set_rotation_inertia( &ri );
}

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@ -174,8 +174,7 @@ void CVPhysicsParse::ParseSolid( solid_t *pSolid, IVPhysicsKeyHandler *unknownKe
}
else if ( !Q_stricmp( key, "inertia" ) )
{
float inertia = atof(value);
pSolid->params.inertia = (inertia > 1e14f) ? 1e14f : inertia;
pSolid->params.inertia = atof(value);
}
else if ( !Q_stricmp( key, "damping" ) )
{
@ -469,8 +468,7 @@ void CVPhysicsParse::ParseVehicleWheel( vehicle_wheelparams_t &wheel )
}
else if ( !Q_stricmp( key, "inertia" ) )
{
float inertia = atof(value);
wheel.inertia = (inertia > 1e14f) ? 1e14f : inertia;
wheel.inertia = atof(value);
}
else if ( !Q_stricmp( key, "damping" ) )
{

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@ -473,11 +473,11 @@ CPackedStore::~CPackedStore( void )
}
// Free the FindFirst cache data
m_directoryList.PurgeAndDeleteElements();
m_directoryList.PurgeAndDeleteElementsArray();
FOR_EACH_MAP( m_dirContents, i )
{
m_dirContents[i]->PurgeAndDeleteElements();
m_dirContents[i]->PurgeAndDeleteElementsArray();
delete m_dirContents[i];
}
}