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aarch64: fix android build
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@@ -1215,7 +1215,7 @@ FORCEINLINE int RoundFloatToInt(float f)
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};
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flResult = __fctiw( f );
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return pResult[1];
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#elif defined (__arm__) || defined (__arm64__)
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#elif defined (__arm__) || defined (__aarch64__)
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return (int)(f + 0.5f);
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#else
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#error Unknown architecture
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@@ -1247,7 +1247,7 @@ FORCEINLINE unsigned long RoundFloatToUnsignedLong(float f)
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Assert( pIntResult[1] >= 0 );
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return pResult[1];
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#else // !X360
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#if defined(__arm__) || defined(__arm64__)
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#if defined(__arm__) || defined(__aarch64__)
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return (unsigned long)(f + 0.5f);
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#elif defined( PLATFORM_WINDOWS_PC64 )
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uint nRet = ( uint ) f;
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File diff suppressed because it is too large
Load Diff
@@ -42,7 +42,7 @@ public:
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Polyhedron_IndexedLine_t *pLines;
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Polyhedron_IndexedLineReference_t *pIndices;
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Polyhedron_IndexedPolygon_t *pPolygons;
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unsigned short iVertexCount;
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unsigned short iLineCount;
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unsigned short iIndexCount;
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@@ -53,10 +53,10 @@ public:
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Vector Center( void );
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};
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class CPolyhedron_AllocByNew final : public CPolyhedron
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class CPolyhedron_AllocByNew : public CPolyhedron
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{
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public:
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void Release( void ) override;
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virtual void Release( void );
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static CPolyhedron_AllocByNew *Allocate( unsigned short iVertices, unsigned short iLines, unsigned short iIndices, unsigned short iPolygons ); //creates the polyhedron along with enough memory to hold all it's data in a single allocation
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private:
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@@ -8,7 +8,7 @@
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#if defined( _X360 )
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#include <xboxmath.h>
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#elif defined(__arm__) || defined(__arm64__)
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#elif defined(__arm__) || defined(__aarch64__)
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#include "sse2neon.h"
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#else
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#include <xmmintrin.h>
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@@ -1787,6 +1787,18 @@ FORCEINLINE fltx4 LoadAlignedSIMD( const VectorAligned & pSIMD )
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return SetWToZeroSIMD( LoadAlignedSIMD(pSIMD.Base()) );
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}
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#ifdef __SANITIZE_ADDRESS__
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static __attribute__((no_sanitize("address"))) fltx4 LoadUnalignedSIMD( const void *pSIMD )
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{
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return _mm_loadu_ps( reinterpret_cast<const float *>( pSIMD ) );
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}
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static __attribute__((no_sanitize("address"))) fltx4 LoadUnaligned3SIMD( const void *pSIMD )
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{
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return _mm_loadu_ps( reinterpret_cast<const float *>( pSIMD ) );
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}
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#else
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FORCEINLINE fltx4 LoadUnalignedSIMD( const void *pSIMD )
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{
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return _mm_loadu_ps( reinterpret_cast<const float *>( pSIMD ) );
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@@ -1796,6 +1808,7 @@ FORCEINLINE fltx4 LoadUnaligned3SIMD( const void *pSIMD )
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{
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return _mm_loadu_ps( reinterpret_cast<const float *>( pSIMD ) );
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}
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#endif
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/// replicate a single 32 bit integer value to all 4 components of an m128
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FORCEINLINE fltx4 ReplicateIX4( int i )
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@@ -23,7 +23,7 @@
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#include "tier0/dbg.h"
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#include "mathlib/math_pfns.h"
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#ifdef __arm__
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#if defined (__arm__) || defined(__aarch64__)
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#include "sse2neon.h"
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#endif
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