MerryMage
a208c7b059
externals: Update dynarmic to b2a4da5e
2021-04-11 15:39:45 +01:00
MerryMage
0fbd7752c3
arm_dynarmic: Increase size of code cache
2021-04-02 18:09:15 +01:00
MerryMage
a527e5f0cd
externals: Update dynarmic to c28f13af
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AVX-512 bugfixes
2021-03-27 21:34:20 +00:00
MerryMage
52dae41d7f
arm_dynarmic: Always have a 'valid' jit instance
2021-03-24 18:47:17 +00:00
MerryMage
59173ff7a7
fiber: Double default stack size
...
Stack overflow occurs with some guest applications
2021-03-10 20:37:56 +00:00
MerryMage
8d00265998
ring_buffer: Remove granularity template argument
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Non-obvious bug in RingBuffer::Push(std::vector<T>&) when granularity != 1
Just remove it altogether because we do not have a use for granularity != 1
2021-02-06 19:16:00 +00:00
MerryMage
821fc4a7b6
arm_dynarmic_32: Print out CPSR.T on exception
2021-02-01 18:35:33 +00:00
MerryMage
2350b76a91
externals: Update dynarmic to 0f27368f
2021-01-26 23:46:49 +00:00
MerryMage
21199cb965
vulkan_library: Common::DynamicLibrary::Open is [[nodiscard]]
...
Ignore the return value on __APPLE__ systems as well
2021-01-07 17:37:47 +00:00
MerryMage
aace20afc7
texture_cache: Replace PAGE_SHIFT with PAGE_BITS
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PAGE_SHIFT is a #define in system headers that leaks into user code on some systems
2021-01-07 16:51:34 +00:00
MerryMage
8a5356357f
externals: Update dynarmic to 3806284cb
2021-01-02 20:42:11 +00:00
MerryMage
57c9da1b39
dynarmic: Add Unsafe_InaccurateNaN optimization
2021-01-02 20:13:21 +00:00
MerryMage
6d30745d77
memory: Remove MemoryHook
2021-01-01 11:34:38 +00:00
MerryMage
836ec9176a
dynarmic: Add unsafe optimizations
2020-08-16 14:15:39 +01:00
MerryMage
a67d00ef31
configure_cpu: Split optimization settings off into Debug tab
2020-07-12 19:32:32 +01:00
MerryMage
da11a27f42
configure_cpu: Add tooltips
2020-07-11 16:38:38 +01:00
MerryMage
505aa3a4c1
configure_cpu: Show/Hide debugging options
2020-07-11 16:38:38 +01:00
MerryMage
6744e7ea4a
CMakeLists: Do not search for system libusb on macOS
2020-07-11 14:37:34 +01:00
MerryMage
0193202964
configuration: Add settings to enable/disable specific CPU optimizations
2020-07-11 14:34:09 +01:00
merry and GitHub
dff8f1f9f8
Merge pull request #4270 from MerryMage/rm-pragma-once
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cpu_interrupt_handler: Remove #pragma once from .cpp file
2020-07-07 23:13:55 +01:00
MerryMage
e7c77b90c4
cpu_interrupt_handler: Remove #pragma once from .cpp file
2020-07-07 22:47:00 +01:00
MerryMage
76bd617b2d
memory: Set page-table pointers before setting attribute = Memory
2020-07-05 12:54:19 +01:00
MerryMage
c12eb814b4
macro_jit_x64: Use ecx for shift register
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shl/shr only accept cl as their second argument
2020-06-20 22:24:05 +01:00
merry and GitHub
928e9c09aa
Merge pull request #4125 from lioncash/macro-shift
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macro_jit_x64: Amend readability of Compile_ExtractShiftLeftRegister()
2020-06-20 16:08:23 +01:00
merry and GitHub
2bd903e021
Merge pull request #4123 from lioncash/unused-var
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macro_jit_x64: Remove unused variable
2020-06-20 16:07:58 +01:00
MerryMage
c6a963c48e
input_common/motion_emu: Remove redundant move
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Named return value optimization automatically applies here.
2020-06-19 14:29:59 +01:00
MerryMage
8272f53cf9
input_common/keyboard: Remove redundant move
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Named return value optimization automatically applies here.
2020-06-19 14:29:36 +01:00
MerryMage
7236393114
mii_model: Remove redundant std::move
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Named return value optimization automatically applies here.
2020-06-19 14:29:09 +01:00
MerryMage
977ceb4056
macro_jit_x64: Remove unused function Read
2020-06-19 11:39:41 +01:00
MerryMage
778f86989a
bootmanager: Remove references to OpenGL for macOS
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OpenGL macOS headers definitions clash heavily with each other
2020-06-18 15:47:44 +01:00
MerryMage
b19fe55f84
memory_manager: Explicitly specifcy std::min<size_t>
2020-06-18 15:47:44 +01:00
MerryMage
4f09f0aea4
shared_font: Service::NS::EncryptSharedFont takes a size_t&
2020-06-18 15:47:44 +01:00
MerryMage
69f38355ed
vk_rasterizer: BindTransformFeedbackBuffersEXT accepts a size of type VkDeviceSize
2020-06-18 15:47:44 +01:00
MerryMage
b1eada6079
renderer_vulkan: Fix macOS GetBundleDirectory reference
2020-06-18 15:47:44 +01:00
MerryMage
442e48ef4c
memory_util: boost hashes are size_t
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* boost::hash_value returns a size_t
* boost::hash_combine takes a size_t& argument
2020-06-18 15:47:43 +01:00
MerryMage
8ae7154541
Rename PAGE_SHIFT to PAGE_BITS
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macOS header files #define PAGE_SHIFT
2020-06-18 15:47:43 +01:00
MerryMage
44f10d9b9f
macro_jit_x64: Inline Engines::Maxwell3D::GetRegisterValue
2020-06-17 17:17:08 +01:00
MerryMage
52bcfac116
arm_dynarmic_cp15: Implement CNTPCT
2020-06-17 17:10:24 +01:00
MerryMage
109df7705f
arm_dynarmic_cp15: Update CP15
2020-06-17 17:10:24 +01:00
MerryMage
32a127faaa
arm_dynarmic_32: InterpreterFallback should never happen
2020-06-17 17:10:24 +01:00
MerryMage
c409722435
macro_jit_x64: Optimization implicitly assumes same destination
2020-06-17 10:36:36 +01:00
MerryMage
a6ddd7c382
macro_jit_x64: Should not skip zero registers for certain ALU ops
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The code generated for these ALU ops assume src_a and src_b are always valid.
2020-06-17 10:36:34 +01:00
MerryMage
256cb2979b
CMakeLists: xbyak comes before dynarmic
2020-06-15 22:37:27 +01:00
MerryMage
cf0aad7d6a
macro_jit_x64: Remove NEXT_PARAMETER
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Not required, as PARAMETERS can just be incremented directly.
2020-06-15 21:19:38 +01:00
MerryMage
1799f4e774
macro_jit_x64: Remove unused function Compile_WriteCarry
2020-06-15 21:19:38 +01:00
MerryMage
c09a9e5cc7
macro_jit_x64: Select better registers
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All registers are now callee-save registers.
RBX and RBP selected for STATE and RESULT because these are most commonly accessed; this is to avoid the REX prefix.
RBP not used for STATE because there are some SIB restrictions, RBX emits smaller code.
2020-06-15 21:19:38 +01:00
MerryMage
79aa7b3ace
macro_jit_x64: Remove REGISTERS
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Unnecessary since this is just an offset from STATE.
2020-06-15 21:00:59 +01:00
MerryMage
35db6e1c68
macro_jit_x64: Remove JITState::parameters
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This can be passed in as an argument instead.
2020-06-15 20:55:02 +01:00
MerryMage
389549b80d
macro_jit_x64: Remove METHOD_ADDRESS_64
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Unnecessary variable.
2020-06-15 20:51:33 +01:00
MerryMage
a6a43a5ae0
macro_jit_x64: Remove RESULT_64
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This Reg64 codepath has the exact same behaviour as the Reg32 one.
2020-06-15 20:35:08 +01:00
MerryMage
7c6203dc5e
xbyak_abi: Prefer returning a struct to using out parameters in ABI_CalculateFrameSize
2020-06-15 19:07:11 +01:00
MerryMage
36362e9695
xbyak_abi: Register indexes should be unsigned
2020-06-15 19:07:11 +01:00
MerryMage
d563017dfe
xbyak_abi: Remove *GPS variants of stack manipulation functions
2020-06-15 18:59:54 +01:00
MerryMage
4417770ba9
xbyak_abi: Fix ABI_PushRegistersAndAdjustStack
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Pushing GPRs twice.
2020-06-15 18:59:01 +01:00
MerryMage
b7a69501cd
externals: Update dynarmic to e7166e8b
2020-04-29 14:25:53 +01:00
MerryMage
a3a12deecc
dynarmic: Add option to disable CPU JIT optimizations
2020-04-20 13:36:26 +01:00
MerryMage
2bfac7b61d
thread: FPCR.FZ is likely not 1
2020-04-19 08:37:20 +01:00
MerryMage and FearlessTobi
1cc9507bc5
gdbstub: Fix some gdbstub jankiness
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1. Ensure that register information available to gdbstub is most up-to-date.
2. There's no reason to check for current_thread == thread when emitting a trap.
Doing this results in random hangs whenever a step happens upon a thread switch.
2020-04-17 05:41:43 +02:00
Merry and GitHub
c63e68c480
Merge pull request #2451 from lioncash/travis
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travis: Update to using Xcode 10.2
2019-05-07 15:36:13 +01:00
MerryMage and fearlessTobi
2bcebcff2a
travis: Simplify macos/upload.sh
2019-03-23 01:33:53 +01:00
MerryMage
51f609fee7
CMakeLists: Raise minimum Boost requirement to 1.66.0
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Required due to bugfix in boost for changed template resolving rules in GCC 7.3.0 in C++17 mode
2019-03-17 23:04:03 +00:00
MerryMage
eef6ce79a9
kernel/thread: Set default fpcr
2018-12-18 17:37:03 +00:00
MerryMage
fd2c42bfcd
arm_dynarmic: Set CNTFRQ value
2018-12-18 17:28:12 +00:00
MerryMage
3031aa9d27
externals: Update dynarmic to 4e6848d
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4e6848d A32/ir_emitter: Bugfix: ExceptionRaised was producing incorrect PC
41ba9fd value: Move ImmediateToU64() to be a part of Value's interface
c6a6271 reg_alloc: Emit AVX instructions where able
aedd32a abi: Emit AVX instructions where able
f2d9337 a64_exclusive_monitor: Loosen memory ordering requirements
7ca709d travis: Make macOS builds use Xcode 10
14dd45e Fix VShift terminology
88554c4 emit_x64_vector: AVX512 implementation of EmitVectorLogicalVShiftS16
ab4e316 emit_x64_vector: AVX512 implementation of EmitVectorLogicalVShiftS64
0ea84f3 emit_x64_vector: AVX2 implementation of EmitVectorLogicalVShiftS32
c77a2c5 emit_x64_vector: AVX512 implementation of EmitVectorLogicalVShiftU16()
e9441fd emit_x64_vector: AVX2 implementation of EmitVectorLogicalVShiftU64()
0e9c33c emit_x64_vector: AVX2 implementation of EmitVectorLogicalVShiftU32()
8f85274 emit_x64_vector: SSSE3 variant of EmitVectorCountLeadingZeros8()
be05e75 Merge pull request #397 from VelocityRa/dec-shift-fix
bc328fc decoders: Cast to correctly-sized type before shifting
9c3d2d1 a64_emit_x64: Lowercase PAGE_SIZE
f538d29 emit_x64_vector_floating_point: SSE4.1 implementation of EmitFPVectorToFixed
1603a6e emit_x64_vector_floating_point: EmitFPVectorRoundInt: Use FCODE
2e1ccaf emit_x64_vector: AVX implementation for EmitVectorCountLeadingZeros8
555bfda emit_x64_vector: SSE implementation of EmitVectorCountLeadingZeros16
71c2589 externals: Update Xbyak to 5.73
1ec1b2f Squashed 'externals/xbyak/' changes from 1de435ed..42462ef9
2018-09-30 19:45:27 +01:00
Merry and GitHub
f8e46d335f
Merge pull request #1418 from FearlessTobi/port-4269
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Port citra-emu/citra#4269 : "OSX: Set MACOSX_DEPLOYMENT_TARGET to 10.13"
2018-09-30 13:51:21 +01:00
MerryMage
ef31487624
arm_dynarmic: Halt when BRK encountered
2018-09-20 19:12:42 +01:00
MerryMage
3b4a158230
arm_dynarmic: Support BKPT instruction
2018-09-19 21:00:38 +01:00
MerryMage
321eb0b6b0
externals: Update dynarmic to 171d116
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171d116 A64: Implement SCVTF, UCVTF (vector, fixed-point), scalar variant
f221bb0 emit_x64_floating_point: Reduce fallback LUT code in EmitFPToFixed
eb123e2 A64: Implement FCVTZS, FCVTZU, UCVTF, SCVTF (vector, fixed-point), vector variant
487d37a A64: Implement UQSHL's vector immediate and register variants
f698933 ir: Add opcodes for unsigned saturating left shifts
7148e66 A64/translate/impl: Make signatures consistent for unimplemented by-element SIMD variants
fdde4ca A64: Implement BRK
b1490db A64/imm: Add full range of comparison operators to Imm template
1ec40ef IR: Add fbits argument to FPVectorFrom{Signed,Unsigned}Fixed
d6d5e98 A64: Implement SCVTF, UCVTF (scalar, fixed-point)
6513595 opcodes.inc: Align columns to a tabstop of 4
6b0d2b5 IR: Add fbits argument to FixedToFP-related opcodes
c4b3831 A64: Implement SQSHL's vector immediate variant
e0d8d2d A64: Implement SQSHL's vector register variant
5327625 ir: Add opcodes for left signed saturated shifts
9705252 branch: Make variables const where applicable
650946e move_wide: Make variables const where applicable
62b3a6d load_store_register_unprivileged: Make variables const where applicable
3add1c7 load_store_register_immediate: Place conditional bodies on their own line
2fc4088 load_store_load_literal: Make variables const where applicable
b2c1462 data_processing_logical: Move datasize declarations after early-exit conditionals
028028f data_processing_conditional_select: Make variables const where applicable
c66042d data_processing_addsub: Move datasize declarations after early-exit conditionals
6bc546e data_processing_bitfield: Move datasize variables after early-exit conditionals
2aad5fa A64: Implement CLS's vector variant
6c877ff emit_x64_vector: Make EmitVectorUnsignedSaturatedAccumulateSigned() internally linked
4b5926d perf_map: Use std::string_view instead of std::string for PerfMapRegister()
7445947 A64: Implement SQRDMULH (vector), vector variant
03b80f2 A64: Implement SQDMULL (vector), vector variant
4a2c596 IR: Add VectorSignedSaturatedDoublingMultiplyLong
59dc33e emit_x64_vector: Changes to VectorSignedSaturatedDoublingMultiply
bbaebeb IR: Implement Vector{Signed,Unsigned}Multiply{16,32}
baac5a8 backend_x64/a64_interface: Re-enable the constant folding pass
e78ca19 emit_x64_vector_floating_point: Hardware FMA implementation for RSqrtStepFused
8a5ae9a emit_x64_vector_floating_point: Hardware FMA implementation of FPVectorRecipStepFused
39818f9 emit_x64_floating_point: Hardware FMA implementation of FPRSqrtStepFused
3d0a0b4 emit_x64_floating_point: Hardware FMA implementation of FPRecipStepFused{32,64}
2293dff emit_x64_vector: SSE implementation of VectorSignedSaturatedAccumulateUnsigned{8,16,32}
2047683 emit_x64_vector: Correct static asserts for < 64-bit type checks in saturated accumulate fallbacks
55e9e40 emit_x64_vector: EmitVectorSignedSaturatedAccumulateUnsigned64: SSE implementation
1076651 emit_x64_vector: Simplify fpsr_qc related code
4039030 A64: Implement CLZ's vector variant
0bb908f ir: Add opcodes for vector CLZ operations
3b13259 A64/translate: VectorZeroUpper for V(64) stores
1931d44 simd_two_register_misc: FNEG (vector) with Q == 0 had dirty upper
a0790f0 emit_x64_vector: Remove unnecessary [[maybe_unused]] attributes
b0e1eb5 A64: Implement USQADD's scalar and vector variants
28424c7 ir: Add opcodes form unsigned saturated accumulations of signed values
9923ea0 A64: Implement SUQADD's scalar and vector variants
4c0adbb ir: Add opcodes for signed saturated accumulations of unsigned values
799bfed A64: Implement SMLAL{2}, SMLSL{2}, UMLAL{2}, and UMLSL{2}'s vector by-element variants
94451ec A64: Implement UMULL{2}'s vector by-element variant
45867de A64: Implement SMULL{2}'s vector by-element variant
0235793 ir/value: Replace includes with forward declarations
450f721 ir/cond: Migrate to C++17 nested namespace specifiers
e649988 CMakeLists: Add missing cond.h header to file listing
d20e769 A64: Implement URSQRTE
4f3bde5 ir: Add opcodes for performing unsigned reciprocal square root estimates
cfeeaec A64: Implement URECPE
622b60e ir: Add opcodes for unsigned reciprocal estimate
d17599a Update Xbyak to 5.71
f7c26e9 Squashed 'externals/xbyak/' changes from 671fc805..1de435ed
8782b69 travis: Make macOS build with Xcode 9.4.1
b575b23 A64: Implement SQNEG's scalar and vector variant
06062a9 A64: Add opcodes for signed saturating negations
1c40579 emit_x64_vector: Simplify "position == 0" case for EmitVectorExtract()
e335050 emit_x64_vector: Simplify "position == 0" case for EmitVectorExtractLower()
8b13421 A64: Implement SQDMULH's by-element scalar variant
9122a6e A64: Implement SQDMULH's by-element vector variant
176e60e backend/x64: Do not clear fast_dispatch_table if not enabled
2018-09-19 20:31:39 +01:00
MerryMage
957ddab679
audio_core: Flush stream when not playing anything
2018-09-12 18:09:14 +01:00
MerryMage
55af5bda55
cubeb_sink: Downsample arbitrary number of channels
2018-09-09 09:51:46 +01:00
MerryMage
1aa195a9c0
cubeb_sink: Perform audio stretching
2018-09-08 18:56:38 +01:00
MerryMage
e51bd49f87
audio_core: Add audio stretcher
2018-09-08 18:56:38 +01:00
MerryMage
7e697ab7ff
cubeb_sink: Hold last available value instead of writing zeros
...
This reduces clicking in output audio should we underrun.
2018-09-08 18:56:38 +01:00
MerryMage
6d9dd1dc6d
cubeb_sink: Use RingBuffer
2018-09-08 18:56:38 +01:00
MerryMage
112351d557
common: Implement a ring buffer
2018-09-08 18:56:38 +01:00
MerryMage
a76f0d5d06
audio_renderer: Rename AudioOut instance to audio_out
2018-09-08 16:50:12 +01:00
MerryMage
7e9b79955f
externals: Update dynarmic to 9594465
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9594465 A64: Implement FastDispatchHint
2be95f2 A32: Implement FastDispatchHint
96f23ac ir/terminal: Add FastDispatchHint
f5ca9e9 A64: Implement SQDMULH's scalar variant
af8bea5 ir: Add opcodes for scalar signed saturated doubling multiplies
fed4220 A64: Implement SQDMULH's vector variant
72eb6ad ir: Add opcodes for signed saturated doubling multiplies
0f8ae84 externals: Update catch to 2.4.0
235165b A64: Implement SQABS' scalar variant
1adca93 A64: Implement SQABS' vector variant.
f978c44 ir: Add opcodes for signed saturated absolute values
d895a84 emit_x64_floating_point: EmitFPToFixed: maxsd optimization
c624fe3 emit_x64_floating_point: ZeroIfNaN: pxor -> xorps
e987a84 IR: Simplify FP{Single,Double}ToFixed{U,S}{32,64}
f1babc8 externals: Update catch to 2.3.0
a0c587a A32/decoder: Add missing <algorithm> includes
2018-09-07 22:16:50 +01:00
MerryMage
3f4fb4b037
perf_stats: Change MAX_LAG_TIME_US to an appropriate value
...
25us is far too small, and would result in std::this_thread::sleep_for
being called with this as a maximum value. This means that a guest
application that produces frames instantly would only be limited to
40 kHz.
25ms is a more appropriate value, as it allows for a 60 Hz refresh
rate while providing enough slack in the negative region.
2018-08-21 14:50:50 +01:00
MerryMage
94329038b6
dynarmic: Update to 550d662
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550d662 load_store_exclusive: Define s == t state to be Constraint_NONE
0b69381 A64/translate: Allow for unpredictable behaviour to be defined
6d236d4 system: Implement MRS CNTFRQ_EL0
6cbb6fb A32/testenv: Add missing headers
6729328 externals: Update xbyak to v5.67
1812bd2 Squashed 'externals/xbyak/' changes from 2794cde7..671fc805
9a95802 externals: Document subtrees
714a840 A64: Implement SQ{ADD, SUB}, and UQ{ADD, SUB}'s vector variants
8cab459 A64: Implement UQADD/UQSUB's scalar variants
18a8151 ir: Add opcodes for unsigned saturating add and subtract
a5660ee x64/reg_alloc: Use type alias for array returned by GetArgumentInfo()
29489b5 ir/value: Use type alias CoprocessorInfo for std::array<u8, 8>
e23ba26 status_register_access: Add support for bits 0 and 1 of mask to MSR
55190bd fuzz_with_unicorn: Split utility functions into fuzz_util
23b049d A32/translate/load_store: Correct detection of writeback
7ec9f15 A32/translate: Add TranslateSingleInstruction
efeecb4 A32/ir_emitter: Bug fix: IREmitter::ExceptionRaised using incorrect opcode
08d1d19 A32/decoders: Split instruction list into include file
2d929cc tests: Refactor unicorn_emu to allow for A32 unicorn
f672368 microinstruction: Improve assert messages
7ebff50 emit_x64_vector: EmitVectorNarrow16: AVX512 implementation
edce230 emit_x64_vector: EmitVectorNarrow32: prefer pblendw to loading constant
2018-08-16 10:12:20 +01:00
MerryMage
fcc5155601
arm_dynarmic: Remove IsExecuting check from PrepareReschedule
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No longer required. HaltExecution is a no-op if it is not currently executing.
2018-08-13 13:59:01 +01:00
MerryMage
01d199965a
audio_renderer: samples_remaining counts frames, not samples
2018-08-13 11:26:50 +01:00
MerryMage
4b44b8b4fb
audio_core: Interpolate
2018-08-13 11:26:50 +01:00
MerryMage
56300f2928
audio_core: Implement low-pass filter
2018-08-13 11:26:50 +01:00
MerryMage
fcc5ffdfdd
cubeb_sink: Protect queue with a mutex
2018-08-12 20:41:46 +01:00
MerryMage
ef41983c84
dynarmic: Update to 0118ee0
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0118ee0 emit_x64_vector: packusdw is SSE4.1
2018-08-10 11:15:04 +01:00
MerryMage
e816745b19
externals: Update dynarmic to 4f96c63
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4f96c63 emit_x64_vector_floating_point: Simplify FPVector{Min,Max}
e15fdfe emit_x64_vector_floating_point: Simplify Get*Vector functions
734a00b emit_x64_floating_point: Remove EmitProcessNaNs
fd45191 devirtualize: Replace DEVIRT macro with function template
67ba5d0 fuzz_with_unicorn: Remove FCVT_float from ignore list
66e6dd1 a32_emit_x64: std::move A32::UserConfig in the constructor
b4890b6 emit_x64_floating_point: Use EmitPostProcessNaNs in EmitFPMulX
18b2943 emit_x64_floating_point: Remove unnecessary DenormalsAreZero from EmitFPSingleToDouble and EmitFPDoubleToSingle
df1f81f emit_x64_floating_point: Simplify EmitFP{Min,Max}{,Numeric}{32,64}
21fb1c3 emit_x64_floating_point: Reduce NaN processing overhead
f5c9f0f A64: Implement FMULX, scalar single/double variant
8f47773 IR: Implement FPMulX IR instruction
79e6440 fuzz_with_unicorn: Randomize SP
33c80e3 fuzz_with_unicorn: Randomize PC
8d41024 testenv: Make code_mem mobile
a9fae0e emit_x64_vector: Vectorize 32-bit variants of paired min/max
8926a92 emit_x64_vector: Improve code emission of VectorGetElement* for index == 0
e20bd38 reg_alloc: Do a UseScratch if a Use destination is too small
a19fa0e fuzz_with_unicorn: Randomize FPCR.AHP and FPCR.FZ16
775f368 emit_x64_floating_point: AVX implementation of ForceToDefaultNaN
71018a1 emit_x64_vector_floating_point: Prefer blendvp{s,d} to vblendvp{s,d} where possible
137f4b3 backend_x64: Remove all use of xmm0
e73d67a emit_x64_vector_floating_point: AVX implementation of ForceToDefaultNaN
43cca54 emit_x64_vector_floating_point: Reduce codesize of ForceToDefaultNaN
5dc40f4 emit_x64_vector_floating_point: Reduce codesize of EmitTwoOpVectorOperation
07622ee emit_x64_vector_floating_point: Correct FMA in FTZ mode
621c85b emit_x64_floating_point: DenormalsAreZero is redundant as hardware already does DAZ
3d0ebaa emit_x64_floating_point: FlushToZero is redundant as hardware already does FTZ
f626ff8 backend_x64: Fix FPVectorMulAdd and FPMulAdd NaN handling with denormals
adeb9d9 a32/fuzz_arm: Disable vfp tests
19ea70d fuzz_with_unicorn: Randomize FPCR.FZ
895db36 backend_x64: Fix bugs when FPCR.FZ=1
d7e2de2 fuzz_with_unicorn: Extract RandomFpcr function
c858d6c fp/info: Deduplicate functions
5b88ec2 emit_x64_floating_point: Deduplicate EmitFPMulAdd implementation
2018-08-05 17:04:23 +01:00
MerryMage
99b5aa273c
externals: Update dynarmic to 73d3efc
...
73d3efc emit_x64_floating_point: Deduplicate code
c9508c3 fuzz_with_unicorn: Randomize FPCR.DN
2970833 emit_x64_vector_floating_point: Fix FPVector{Max,Min} when FPCR.DN = 1
150764f emit_x64_floating_point: Fix FP{Max,Min} when FPCR.DN = 1
b7d209c IR: SSE4.1 implementation of FPVectorRoundInt
8cf8270 A64: Implement FRINT{N,M,P,Z,A,X,I} (vector), single/double variant
8f46c26 IR: Initial implementation of FPVectorRoundInt
97017bb A64: Implement SQADD and SQSUB, scalar variant
ce58863 IR: Generalise SignedSaturated{Add,Sub} to support more bitwidths
e80f8ff a64_emit_x64: Bugfix EmitA64OrQC - Incorrect argument
1e4ec7e simd_three_same: Extract non-paired SMAX, SMIN, UMAX, UMIN code to a common function
6f9dc9b A64: Implement SMAXP, SMINP, UMAXP, UMINP
1dfb29f ir: Add opcodes for vector paired maximum and minimums
017b510 A64: Implement SMAXV, SMINV, UMAXV, and UMINV
aae22ee ir: Add opcodes for performing scalar integral min/max
6ef3af3 A64: Implement PMULL{2}
2a4ce19 translate: Deduplicate GetDataSize() functions
0e01500 floating_point_{conditional}_compare: Deduplicate code
259237c common: Move all cryptographic function to common/crypto
c5f1080 a32_emit_x64: BMI2 implementation of A32SetCpsr
a23304a a32_emit_x64: Shorten EmitA32GetCpsr
57604d2 a32_emit_x64: Assert that memory layout assumption in EmitA32GetCpsr is valid
945fa48 A64: Implement PMUL
656a404 ir: Add opcode for performing polynomial multiplication
05143df A64: Implement FCVT{N,M,A,P}{U,S} (vector), FCVTZU (vector, integer), single/double variant
34ce767 A64: Implement FCVTZS (vector, integer), single/double variant
0f9bc2d IR: Implement FPVectorTo{Signed,Unsigned}Fixed
0189e44 fp/info: Replace constant value generators with FPValue
db16568 emit_x64_vector_floating_point: AVX implementation of FPVector{Max,Min}
31148bd emit_x64_vector_floating_point: Remove unnecessary double jump in HandleNaNs
4c3ca51 A64: Implement FMAX's vector single and double precision variants
bf0f21c A64: Implement FMIN's vector single and double precision variants
76f0ca0 IR: Implement FPVector{Max,Min}
6c37c31 FPRecipEstimate: Move offset out of function
59546f3 microinstruction: Update ReadsFromAndWritesToFPSRCumulativeExceptionBits
3f6b03a A64: Implement FRECPS, vector/scalar single/double variants
2d2ca5e IR: Implement FPRecipStepFused, FPVectorRecipStepFused
5cb9f1d A64: Implement FRECPE, vector single/double variant
c5a14ab IR: Implement FPVectorRecipEstimate
56f8a0b A64: Implement FRECPE, scalar single/double variant
fde69b4 IR: Implement FPRecipEstimate
186e52c IR: Implement FPRecipEstimate
cf2e1ae fp: Change FPUnpacked to a normalized representation
2018-07-30 18:23:54 +01:00
MerryMage
abc5b3347d
externals: Update dynarmic to 98e2380
...
98e2380 fuzz_with_unicorn: Disable testing of FDIV
041b7d5 block_of_code: Add ABI_PARAMS array
2a2371c A64: Implement MLA, MLS (by element), vector single/double variant
78c640a A64: Implement FMLS (vector), single/double variant
b6b6993 emit_x64_vector_floating_point: Specify NanHandler::function_type explicitly
4b9d12a emit_x64_vector_floating_point: ChooseOnFsize arguments maybe_unused
b1e3616 IR: Implement FPVectorNeg
4343612 A64: Implement FMLA (vector), single/double variant
93eeb25 IR: Implement FPVectorMulAdd
57e5c7e emit_x64_vector_floating_point: Standardize naming scheme
bcb9e41 emit_x64_floating_point: Simplify indexers
83aa585 emit_x64_vector_floating_point: Simplify EmitVectorOperation*
f4087c8 mp: rename mp.h to mp/function_info.h
1864090 emit_x64_vector: Slightly improve ArithmeticShiftRightByte
e048441 emit_x64_vector: Simplify VectorShuffleImpl
ff025e8 IR: Implement A64OrQC
6fac68d A64: Implement UQSHRN, UQRSHRN (vector)
5a8d9c3 emit_x64_vector: -0x80000000 isn't -0x80000000
759289e A64: Implement UQXTN (vector)
2a96281 emit_x64_vector: Fix non-SSE4.1 saturated narrowing reconstruction comparison
0682353 A64: Implement SQXTN (vector)
6c5229e emit_x64_vector: packusdw reqiures SSE4.1
158d9b1 A64: Implement SQSHRUN, SQRSHRUN (vector)
f886013 simd_shift_by_immediate: Simplify ShiftRight
d9b59c6 A64: Implement SQXTUN
50fe28b microinstruction: Reorganize FPSCR related instruction queries
d9d036a microinstruction: Add missing FP scalar opcodes to ReadsFromFPSCR() and WritesToFPSCR()
db96163 u128: Make Bit() a const-qualified member function
f7052ae A64: Implement FRSQRTS (vector), single/double variant
0925ef6 A64: Implement FRSQRTE (vector), single/double variant
f4cbbe3 A64: Implement FRSQRTS (scalar), single/double variant
4ef864e IR: Implement FPRSqrtStepFused
9dffeeb fp: Implement FPRSqrtStepFused
aa04556 fp: Implement FPNeg
cbde1c5 process_nan: Add two operand variant
1ec2663 A64: Implement FMAXP, FMINP, FMAXNMP and FMINNMP's scalar double/single-precision variant
027ddf9 emit_x64_floating_point: Fixup special NaN case in FMA FPMulAdd implementation
75a9f77 fp: Use a forward declaration in fused.h
1ee1630 u128: Implement comparison operators in terms of one another
3b77f48 tests: Print cpu info
bed3cc0 u128: StickyLogicalShiftRight requires special-casing for amount == 64
15d04f4 A64: Implement FMLA and FMLS (by element)'s double/single-precision scalar variant
7cfccdf A64: Implement FMUL (by element)'s scalar double/single-precision variant
7d2d62e (fpmuladd) emit_x64_floating_point: Implement accurate fallback for FPMulAdd{32,64}
a599eac fp: Implement FPMulAdd
d70b90e process_nan: Add FPProcessNaNs3
38ef0e0 block_of_code: Add SysV ABI fifth and sixth parameters
8e2ff56 u128: Add StickyLogicalShiftRight
3b337df u128: Add Multiply64To128
8219075 u128: Add u128::Bit
a574dcb u128: Add comparison operators
391d6d4 unpacked: Use ResidualErrorOnRightShift in FPRoundBase
5e0cf9c fp: Remove MantissaT
8c0a84c FPRSqrtEstimate: Improve documentation of RecipSqrtEstimate
c41d855 FPRSqrtEstimate: Deduplicate array bounds
4cf055b A64: Implement FMAXV, FMINV, FMAXNMV, and FMINNMV
bf24f0f FPRSqrtEstimate: Use forward declarations where applicable
206230e translate: Return by bool in helpers where applicable
346b725 Simplify fallback case for EmitVectorSetElement64()
2c34e1d emit_x64_floating_point: s/Esimate/Estimate/
5213fb6 simd_scalar_two_register_misc: Implement FRSQRTE, scalar variant
7ed089f IR: Implement FPRSqrtEstimate
cd2e286 simd_vector_x_indexed_element: Implement FMUL (by element), vector variant
2018-07-25 14:26:51 +01:00
MerryMage
44646e2ea0
core_timing: Split off utility functions into core_timing_util
2018-07-24 11:03:24 +01:00
MerryMage
b8459d2778
CMakeLists: Sort filenames
2018-07-24 11:02:53 +01:00
MerryMage
7dde4b7a77
externals: Update dynarmic to fc6b73bd
...
Resolves issues:
* 128-bit exclusive writes on Windows
* Non-updating CNTPCT_EL0
fc6b73 a64_emit_x64: Ensure host has updated ticks in EmitA64GetCNTPCT
888c67 a64_emit_x64: Fix stack misalignment on Windows for 128-bit exclusive writes
352d53 emit_x64_aes: Eliminate extraneous usage of a scratch register in EmitAESInverseMixColumns()
ab7fe7 A64: Implement SADDLV
09bd2b A64: Implement UADDLV
62e86d fp: Use forward declarations where applicable
b3edb7 emit_x64_vector: Append 'v' prefix onto movq in AVX path
2018-07-22 16:26:47 +01:00
MerryMage
0b1c2e5505
Implement exclusive monitor
2018-07-22 15:55:17 +01:00
MerryMage
56cc1c11ec
scheduler: Clear exclusive state when switching contexts
2018-07-16 11:24:00 +01:00
MerryMage
57eca6374a
dynarmic: Update to 9cc12d8
...
9cc12d8 abi: Missing includes
ac35ad5 emit_x64_floating_point: Near jump instead of short jump in FPMinNumberic{32,64}
6f03fdd A64: system: Use an enum class for MRS/MSR register encodings
2018-03-29 12:49:21 +01:00
MerryMage
78a81614ee
dynarmic: Update to 12a1020
...
12a1020 emit_X64_floating_point: Near jmp to end instead of short jmp
6278f83 emit_x64_vector: Fix typo in VectorShuffleImpl
25a0204 A64: Implement REV64
aa92e33 bit_util: Do nothing in RotateRight if the rotation amount is zero
e537985 A64: Implement REV32 (vector)
f62a258 ir: Add IR opcodes for emitting vector shuffles
36ac6ec emit_x64_vector_floating_point: Fix out of bounds array access in EmitVectorOperation64
20a59a9 A64: Implement REV16 (vector)
b2f7bb0 CMakeLists: Add fp_util, macro_util and math_util headers
fd21b58 A64: Implement EOR3 and BCAX
a48c0bb travis: Use yuzu's unicorn fork
59e62e0 externals: Update catch to v2.2.1
2018-03-27 08:23:35 +01:00
MerryMage
88c9608eac
arm_dynarmic: Fix timing
2018-03-24 09:02:19 +00:00
MerryMage
32d127ad3e
dynarmic: Update to 6b4c6b0
...
6b4c6b0 impl: Update PC when raising exception
7a1313a A64: Implement FDIV (vector)
b2d781d system: Raise exception for YIELD, WFE, WFI, SEV, SEVL
b277bf5 Correct FPSR and FPCR
7673933 A64: Implement USHL
8d0e558 A64: Implement UCVTF (vector, integer), scalar variant
da9a4f8 A64: Partially implement FCVTZU (scalar, fixed-point) and FCVTZS (scalar, fixed-point)
7479684 A64: Implement system register TPIDR_EL0
0fd75fd A64: Implement system registers FPCR and FPSR
31e370c A64: Implement system register CNTPCT_EL0
9a88fd3 A64: Implement system register CTR_EL0
1d16896 A64: Implement NEG (vector)
3184edf IR: Add IR instruction ZeroVector
31f8fbc emit_x64_floating_point: Add maybe_unused to preprocess parameter
567eb1a A64: Implement FMINNM (scalar)
c6d8fa1 A64: Implement FMAXNM (scalar)
616056d constant_pool: Add frame parameter
a3747cb A64: Implement ADDP (scalar)
5cd5d9f reg_alloc: Only exchange GPRs
dd0452a A64: Implement DUP (element), scalar variant
e5732ea emit_x64_floating_point: Correct FP{Max,Min}{32,64} implementations for -0/+0
40eb9c3 A64: Implement FMAX (scalar), FMIN (scalar)
7cef39b fuzz_with_unicorn: QEMU's implementation of FCVT is incorrect
826dce2 travis: Switch unicorn repository
9605f28 a64/config: Allow NaN emulation accuracy to be set
e9435bc a64_emit_x64: Add conf to A64EmitContext
30b596d fuzz_with_unicorn: Explicitly test floating point instructions
be292a8 A64: Implement FSQRT (scalar)
3c42d48 backend_x64: Accurately handle NaNs
4aefed0 fuzz_with_unicorn: Print AArch64 disassembly
2018-02-21 21:39:07 +00:00
MerryMage
e8b9731af3
arm_dynarmic: LOG_INFO on unicorn fallback
2018-02-21 21:39:07 +00:00
MerryMage
cc368de1a0
memory: LOG_ERROR when falling off end of page table
2018-02-21 21:39:07 +00:00
MerryMage
1cdc74c5e9
core: Fix scheduler-shutdown related crash
2018-02-21 16:38:18 +00:00