Merge pull request #1903 from heapo/fmul_postfactor
Implement postfactor multiplication/division for fmul instructions
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						95255899e7
					
				@ -575,7 +575,7 @@ union Instruction {
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    union {
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					    union {
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        BitField<39, 2, u64> tab5cb8_2;
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					        BitField<39, 2, u64> tab5cb8_2;
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        BitField<41, 3, u64> tab5c68_1;
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					        BitField<41, 3, u64> postfactor;
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        BitField<44, 2, u64> tab5c68_0;
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					        BitField<44, 2, u64> tab5c68_0;
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        BitField<48, 1, u64> negate_b;
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					        BitField<48, 1, u64> negate_b;
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    } fmul;
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					    } fmul;
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@ -1867,9 +1867,6 @@ private:
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                UNIMPLEMENTED_IF_MSG(instr.fmul.tab5cb8_2 != 0,
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					                UNIMPLEMENTED_IF_MSG(instr.fmul.tab5cb8_2 != 0,
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                                     "FMUL tab5cb8_2({}) is not implemented",
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					                                     "FMUL tab5cb8_2({}) is not implemented",
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                                     instr.fmul.tab5cb8_2.Value());
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					                                     instr.fmul.tab5cb8_2.Value());
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                UNIMPLEMENTED_IF_MSG(instr.fmul.tab5c68_1 != 0,
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                                     "FMUL tab5cb8_1({}) is not implemented",
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                                     instr.fmul.tab5c68_1.Value());
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                UNIMPLEMENTED_IF_MSG(
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					                UNIMPLEMENTED_IF_MSG(
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                    instr.fmul.tab5c68_0 != 1, "FMUL tab5cb8_0({}) is not implemented",
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					                    instr.fmul.tab5c68_0 != 1, "FMUL tab5cb8_0({}) is not implemented",
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                    instr.fmul.tab5c68_0
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					                    instr.fmul.tab5c68_0
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@ -1879,7 +1876,26 @@ private:
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                op_b = GetOperandAbsNeg(op_b, false, instr.fmul.negate_b);
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					                op_b = GetOperandAbsNeg(op_b, false, instr.fmul.negate_b);
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                regs.SetRegisterToFloat(instr.gpr0, 0, op_a + " * " + op_b, 1, 1,
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					                std::string postfactor_op;
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					                if (instr.fmul.postfactor != 0) {
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					                    s8 postfactor = static_cast<s8>(instr.fmul.postfactor);
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					                    // postfactor encoded as 3-bit 1's complement in instruction,
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					                    // interpreted with below logic.
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					                    if (postfactor >= 4) {
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					                        postfactor = 7 - postfactor;
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					                    } else {
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					                        postfactor = 0 - postfactor;
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					                    }
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					                    if (postfactor > 0) {
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					                        postfactor_op = " * " + std::to_string(1 << postfactor);
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					                    } else {
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					                        postfactor_op = " / " + std::to_string(1 << -postfactor);
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					                    }
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					                }
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					                regs.SetRegisterToFloat(instr.gpr0, 0, op_a + " * " + op_b + postfactor_op, 1, 1,
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                                        instr.alu.saturate_d, 0, true);
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					                                        instr.alu.saturate_d, 0, true);
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                break;
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					                break;
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            }
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					            }
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