From 71858fc7cc6cbc9449172986b644395c750a954f Mon Sep 17 00:00:00 2001
From: Lioncash <mathew1800@gmail.com>
Date: Fri, 12 Jun 2015 19:39:43 -0400
Subject: [PATCH] vfp: Handle accesses to the VFP media feature registers
These are able to be accessed in any privilege mode.
---
src/core/arm/skyeye_common/arm_regformat.h | 2 ++
src/core/arm/skyeye_common/vfp/vfp.cpp | 4 ++++
src/core/arm/skyeye_common/vfp/vfpinstr.cpp | 6 ++----
3 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/src/core/arm/skyeye_common/arm_regformat.h b/src/core/arm/skyeye_common/arm_regformat.h
index 6c89774eb1..a92effbb4d 100644
--- a/src/core/arm/skyeye_common/arm_regformat.h
+++ b/src/core/arm/skyeye_common/arm_regformat.h
@@ -59,6 +59,8 @@ enum {
VFP_FPSID,
VFP_FPSCR,
VFP_FPEXC,
+ VFP_MVFR0,
+ VFP_MVFR1,
// Not an actual register.
// All VFP system registers should be defined above this.
diff --git a/src/core/arm/skyeye_common/vfp/vfp.cpp b/src/core/arm/skyeye_common/vfp/vfp.cpp
index b88d477508..571d6c2f27 100644
--- a/src/core/arm/skyeye_common/vfp/vfp.cpp
+++ b/src/core/arm/skyeye_common/vfp/vfp.cpp
@@ -33,6 +33,10 @@ unsigned VFPInit(ARMul_State* state)
state->VFP[VFP_FPEXC] = 0;
state->VFP[VFP_FPSCR] = 0;
+ // ARM11 MPCore feature register values.
+ state->VFP[VFP_MVFR0] = 0x11111111;
+ state->VFP[VFP_MVFR1] = 0;
+
return 0;
}
diff --git a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp
index d4060b7912..67fe63aa49 100644
--- a/src/core/arm/skyeye_common/vfp/vfpinstr.cpp
+++ b/src/core/arm/skyeye_common/vfp/vfpinstr.cpp
@@ -1141,12 +1141,10 @@ VMRS_INST:
cpu->Reg[inst_cream->Rt] = cpu->VFP[VFP_FPSID];
break;
case 6:
- /* MVFR1, VFPv3 only ? */
- LOG_TRACE(Core_ARM11, "\tr%d <= MVFR1 unimplemented\n", inst_cream->Rt);
+ cpu->Reg[inst_cream->Rt] = cpu->VFP[VFP_MVFR1];
break;
case 7:
- /* MVFR0, VFPv3 only? */
- LOG_TRACE(Core_ARM11, "\tr%d <= MVFR0 unimplemented\n", inst_cream->Rt);
+ cpu->Reg[inst_cream->Rt] = cpu->VFP[VFP_MVFR0];
break;
case 8:
cpu->Reg[inst_cream->Rt] = cpu->VFP[VFP_FPEXC];