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113 lines
2.3 KiB
Plaintext
113 lines
2.3 KiB
Plaintext
incdir "tests"
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include "dsp_base.inc"
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; To use: set up a buffer in main_spy,
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; then modify the start, current, and ending addresses
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; and verify things look correct
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loop_read_test:
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; Set the sample format
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sr @FORMAT, $AC0.H
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; Test parameters
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lri $AC0.M, #0x0000 ; start
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lri $AC0.L, #0x0000 ; start
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lri $AC1.M, #0x0000 ; end
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lri $AC1.L, #0x0011 ; end
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; pred scale, coefs, etc do not matter for raw
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; Set the starting and current address
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srs @ACSAH, $AC0.M
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srs @ACCAH, $AC0.M
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srs @ACSAL, $AC0.L
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srs @ACCAL, $AC0.L
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; Set the ending address
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srs @ACEAH, $AC1.M
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srs @ACEAL, $AC1.L
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call load_hw_reg_to_regs
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call send_back ; check the accelerator regs before a read
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bloopi #4, end_of_read_loop
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lr $IX3, @ACDRAW ; Raw reads
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call load_hw_reg_to_regs
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call send_back ; after a read
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nop
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end_of_read_loop:
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nop
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ret
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loop_write_test:
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; Set the sample format
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sr @FORMAT, $AC0.H
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; Test parameters
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lri $AC0.M, #0x0000 ; start
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lri $AC0.L, #0x0000 ; start
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lri $AC1.M, #0x0000 ; end
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lri $AC1.L, #0x0011 ; end
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; pred scale, coefs, etc do not matter for raw
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; Set the starting and current address
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srs @ACSAH, $AC0.M
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srs @ACCAH, $AC0.M
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srs @ACSAL, $AC0.L
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srs @ACCAL, $AC0.L
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; Set the ending address
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srs @ACEAH, $AC1.M
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srs @ACEAL, $AC1.L
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call load_hw_reg_to_regs
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call send_back ; check the accelerator regs before a write
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bloopi #4, end_of_write_loop
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sr @ACDRAW, $IX3 ; Raw writes
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call load_hw_reg_to_regs
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call send_back ; after a write
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nop
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end_of_write_loop:
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nop
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ret
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test_main:
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lri $AC0.H, #0x00 ; 4-bit
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call loop_read_test
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lri $AC0.H, #0x01 ; 8-bit
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call loop_read_test
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lri $AC0.H, #0x02 ; 16-bit
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call loop_read_test
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lri $AC0.H, #0x00 ; "4-bit", but all writes are 16-bits
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call loop_write_test
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lri $AC0.H, #0x01 ; "8-bit", but all writes are 16-bits
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call loop_write_test
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lri $AC0.H, #0x02 ; 16-bit
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call loop_write_test
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jmp end_of_test
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load_hw_reg_to_regs:
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lr $AR0, @FORMAT
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lr $AR1, @0xffd2 ; unknown
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lr $AR2, @PRED_SCALE
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lr $AR3, @YN1
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lr $IX0, @YN2
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lr $IX1, @ACIN
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lri $AC0.H, #0
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lrs $AC0.M, @ACSAH
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lrs $AC0.L, @ACSAL
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lri $AC1.H, #0
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lrs $AC1.M, @ACEAH
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lrs $AC1.L, @ACEAL
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lrs $AX0.H, @ACCAH
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lrs $AX0.L, @ACCAL
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lrs $AX1.H, @ACCAH
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lrs $AX1.L, @ACCAL
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lrs $AX1.H, @ACCAH
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lrs $AX1.L, @ACCAL
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ret
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