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Jit64: Explicitly get imm for clobbered stores

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If we're on an x64 CPU that doesn't have the MOVBE extension, trying to
SwapAndStore a host register results in that register's value getting
clobbered with the swapped value. Jit64::stX and Jit64::stXx detect this
case, and if necessary, emit a MOV to a register that's fine to clobber.

This logic was broken by the merge of PR 12134. Jit64::stX and
Jit64::stXx were assuming that if RegCache::IsImm returns true for a
guest register, calling RegCache::Use or RegCache::BindOrImm for that
guest register would result in an immediate. However, PR 12134 made it
possible for a guest register to have both a host register and an
immediate in the register cache at the same time. When this happens,
RegCache::IsImm returns true, yet RegCache::Use and RegCache::BindForImm
return an RCOpArg whose Location returns a host register. (To make it
extra confusing, RCOpArg::IsImm calls RegCache::IsImm if the RCOpArg
came from RegCache, so RCOpArg::IsImm returns true!)

To fix this, in cases where Jit64::stX and Jit64::stXx explicitly need
an immediate to avoid having to emit an extra MOV, let's call
RegCache::Imm32 so that we're certain that we're getting an immediate.

This fixes an issue on older x64 CPUs that manifested as e.g. completely
broken graphics in Spyro: Enter the Dragonfly.
This commit is contained in:
JosJuice 2025-12-07 15:52:31 +01:00
parent 213dc1c9af
commit fca27c375a
1 changed files with 15 additions and 6 deletions
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21
Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp
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@ -568,12 +568,19 @@ void Jit64::stX(UGeckoInstruction inst)
{
RCX64Reg Ra = gpr.Bind(a, update ? RCMode::ReadWrite : RCMode::Read);
RCOpArg reg_value;
if (!gpr.IsImm(s) && WriteClobbersRegValue(accessSize, /* swap */ true))
if (WriteClobbersRegValue(accessSize, /* swap */ true))
{
RCOpArg Rs = gpr.Use(s, RCMode::Read);
RegCache::Realize(Rs);
reg_value = RCOpArg::R(RSCRATCH2);
MOV(32, reg_value, Rs);
if (gpr.IsImm(s))
{
reg_value = RCOpArg::Imm32(gpr.Imm32(s));
}
else
{
RCOpArg Rs = gpr.Use(s, RCMode::Read);
RegCache::Realize(Rs);
reg_value = RCOpArg::R(RSCRATCH2);
MOV(32, reg_value, Rs);
}
}
else
{
@ -624,7 +631,9 @@ void Jit64::stXx(UGeckoInstruction inst)
RCOpArg Ra = update ? gpr.Bind(a, RCMode::ReadWrite) : gpr.Use(a, RCMode::Read);
RCOpArg Rb = gpr.Use(b, RCMode::Read);
RCOpArg Rs = does_clobber ? gpr.Use(s, RCMode::Read) : gpr.BindOrImm(s, RCMode::Read);
RCOpArg Rs = does_clobber ?
(gpr.IsImm(s) ? RCOpArg::Imm32(gpr.Imm32(s)) : gpr.Use(s, RCMode::Read)) :
gpr.BindOrImm(s, RCMode::Read);
RegCache::Realize(Ra, Rb, Rs);
MOV_sum(32, RSCRATCH2, Ra, Rb);