240 lines
9.0 KiB
C++
240 lines
9.0 KiB
C++
// Copyright 2020 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <array>
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extern "C" {
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#if defined(__GNUC__) || defined(__clang__)
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wconversion"
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#endif
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#include <libswscale/swscale.h>
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#if defined(__GNUC__) || defined(__clang__)
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#pragma GCC diagnostic pop
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#endif
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}
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#include "common/assert.h"
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#include "common/bit_field.h"
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#include "common/logging/log.h"
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#include "video_core/command_classes/nvdec.h"
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#include "video_core/command_classes/vic.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/gpu.h"
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#include "video_core/memory_manager.h"
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#include "video_core/textures/decoders.h"
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namespace Tegra {
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namespace {
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enum class VideoPixelFormat : u64_le {
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RGBA8 = 0x1f,
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BGRA8 = 0x20,
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RGBX8 = 0x23,
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YUV420 = 0x44,
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};
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} // Anonymous namespace
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union VicConfig {
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u64_le raw{};
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BitField<0, 7, VideoPixelFormat> pixel_format;
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BitField<7, 2, u64_le> chroma_loc_horiz;
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BitField<9, 2, u64_le> chroma_loc_vert;
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BitField<11, 4, u64_le> block_linear_kind;
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BitField<15, 4, u64_le> block_linear_height_log2;
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BitField<32, 14, u64_le> surface_width_minus1;
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BitField<46, 14, u64_le> surface_height_minus1;
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};
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Vic::Vic(GPU& gpu_, std::shared_ptr<Nvdec> nvdec_processor_)
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: gpu(gpu_),
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nvdec_processor(std::move(nvdec_processor_)), converted_frame_buffer{nullptr, av_free} {}
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Vic::~Vic() = default;
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void Vic::ProcessMethod(Method method, u32 argument) {
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LOG_DEBUG(HW_GPU, "Vic method 0x{:X}", static_cast<u32>(method));
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const u64 arg = static_cast<u64>(argument) << 8;
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switch (method) {
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case Method::Execute:
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Execute();
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break;
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case Method::SetConfigStructOffset:
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config_struct_address = arg;
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break;
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case Method::SetOutputSurfaceLumaOffset:
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output_surface_luma_address = arg;
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break;
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case Method::SetOutputSurfaceChromaOffset:
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output_surface_chroma_address = arg;
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break;
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default:
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break;
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}
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}
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void Vic::Execute() {
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if (output_surface_luma_address == 0) {
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LOG_ERROR(Service_NVDRV, "VIC Luma address not set.");
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return;
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}
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const VicConfig config{gpu.MemoryManager().Read<u64>(config_struct_address + 0x20)};
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const AVFramePtr frame_ptr = nvdec_processor->GetFrame();
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const auto* frame = frame_ptr.get();
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if (!frame) {
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return;
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}
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const u64 surface_width = config.surface_width_minus1 + 1;
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const u64 surface_height = config.surface_height_minus1 + 1;
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if (static_cast<u64>(frame->width) != surface_width ||
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static_cast<u64>(frame->height) != surface_height) {
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// TODO: Properly support multiple video streams with differing frame dimensions
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LOG_WARNING(Service_NVDRV, "Frame dimensions {}x{} don't match surface dimensions {}x{}",
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frame->width, frame->height, surface_width, surface_height);
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}
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switch (config.pixel_format) {
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case VideoPixelFormat::RGBA8:
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case VideoPixelFormat::BGRA8:
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case VideoPixelFormat::RGBX8:
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WriteRGBFrame(frame, config);
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break;
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case VideoPixelFormat::YUV420:
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WriteYUVFrame(frame, config);
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break;
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default:
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UNIMPLEMENTED_MSG("Unknown video pixel format {:X}", config.pixel_format.Value());
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break;
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}
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}
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void Vic::WriteRGBFrame(const AVFrame* frame, const VicConfig& config) {
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LOG_TRACE(Service_NVDRV, "Writing RGB Frame");
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if (!scaler_ctx || frame->width != scaler_width || frame->height != scaler_height) {
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const AVPixelFormat target_format = [pixel_format = config.pixel_format]() {
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switch (pixel_format) {
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case VideoPixelFormat::RGBA8:
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return AV_PIX_FMT_RGBA;
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case VideoPixelFormat::BGRA8:
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return AV_PIX_FMT_BGRA;
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case VideoPixelFormat::RGBX8:
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return AV_PIX_FMT_RGB0;
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default:
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return AV_PIX_FMT_RGBA;
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}
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}();
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sws_freeContext(scaler_ctx);
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// Frames are decoded into either YUV420 or NV12 formats. Convert to desired RGB format
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scaler_ctx = sws_getContext(frame->width, frame->height,
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static_cast<AVPixelFormat>(frame->format), frame->width,
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frame->height, target_format, 0, nullptr, nullptr, nullptr);
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scaler_width = frame->width;
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scaler_height = frame->height;
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converted_frame_buffer.reset();
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}
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if (!converted_frame_buffer) {
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const size_t frame_size = frame->width * frame->height * 4;
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converted_frame_buffer = AVMallocPtr{static_cast<u8*>(av_malloc(frame_size)), av_free};
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}
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const std::array<int, 4> converted_stride{frame->width * 4, frame->height * 4, 0, 0};
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u8* const converted_frame_buf_addr{converted_frame_buffer.get()};
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sws_scale(scaler_ctx, frame->data, frame->linesize, 0, frame->height, &converted_frame_buf_addr,
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converted_stride.data());
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// Use the minimum of surface/frame dimensions to avoid buffer overflow.
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const u32 surface_width = static_cast<u32>(config.surface_width_minus1) + 1;
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const u32 surface_height = static_cast<u32>(config.surface_height_minus1) + 1;
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const u32 width = std::min(surface_width, static_cast<u32>(frame->width));
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const u32 height = std::min(surface_height, static_cast<u32>(frame->height));
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const u32 blk_kind = static_cast<u32>(config.block_linear_kind);
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if (blk_kind != 0) {
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// swizzle pitch linear to block linear
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const u32 block_height = static_cast<u32>(config.block_linear_height_log2);
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const auto size = Texture::CalculateSize(true, 4, width, height, 1, block_height, 0);
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luma_buffer.resize(size);
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Texture::SwizzleSubrect(width, height, width * 4, width, 4, luma_buffer.data(),
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converted_frame_buf_addr, block_height, 0, 0);
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gpu.MemoryManager().WriteBlock(output_surface_luma_address, luma_buffer.data(), size);
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} else {
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// send pitch linear frame
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const size_t linear_size = width * height * 4;
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gpu.MemoryManager().WriteBlock(output_surface_luma_address, converted_frame_buf_addr,
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linear_size);
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}
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}
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void Vic::WriteYUVFrame(const AVFrame* frame, const VicConfig& config) {
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LOG_TRACE(Service_NVDRV, "Writing YUV420 Frame");
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const std::size_t surface_width = config.surface_width_minus1 + 1;
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const std::size_t surface_height = config.surface_height_minus1 + 1;
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const std::size_t aligned_width = (surface_width + 0xff) & ~0xffUL;
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// Use the minimum of surface/frame dimensions to avoid buffer overflow.
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const auto frame_width = std::min(surface_width, static_cast<size_t>(frame->width));
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const auto frame_height = std::min(surface_height, static_cast<size_t>(frame->height));
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const auto stride = static_cast<size_t>(frame->linesize[0]);
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luma_buffer.resize(aligned_width * surface_height);
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chroma_buffer.resize(aligned_width * surface_height / 2);
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// Populate luma buffer
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const u8* luma_src = frame->data[0];
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for (std::size_t y = 0; y < frame_height; ++y) {
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const std::size_t src = y * stride;
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const std::size_t dst = y * aligned_width;
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for (std::size_t x = 0; x < frame_width; ++x) {
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luma_buffer[dst + x] = luma_src[src + x];
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}
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}
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gpu.MemoryManager().WriteBlock(output_surface_luma_address, luma_buffer.data(),
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luma_buffer.size());
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// Chroma
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const std::size_t half_height = frame_height / 2;
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const auto half_stride = static_cast<size_t>(frame->linesize[1]);
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switch (frame->format) {
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case AV_PIX_FMT_YUV420P: {
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// Frame from FFmpeg software
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// Populate chroma buffer from both channels with interleaving.
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const std::size_t half_width = frame_width / 2;
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const u8* chroma_b_src = frame->data[1];
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const u8* chroma_r_src = frame->data[2];
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for (std::size_t y = 0; y < half_height; ++y) {
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const std::size_t src = y * half_stride;
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const std::size_t dst = y * aligned_width;
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for (std::size_t x = 0; x < half_width; ++x) {
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chroma_buffer[dst + x * 2] = chroma_b_src[src + x];
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chroma_buffer[dst + x * 2 + 1] = chroma_r_src[src + x];
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}
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}
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break;
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}
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case AV_PIX_FMT_NV12: {
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// Frame from VA-API hardware
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// This is already interleaved so just copy
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const u8* chroma_src = frame->data[1];
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for (std::size_t y = 0; y < half_height; ++y) {
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const std::size_t src = y * stride;
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const std::size_t dst = y * aligned_width;
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for (std::size_t x = 0; x < frame_width; ++x) {
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chroma_buffer[dst + x] = chroma_src[src + x];
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}
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}
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break;
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}
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default:
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UNREACHABLE();
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break;
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}
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gpu.MemoryManager().WriteBlock(output_surface_chroma_address, chroma_buffer.data(),
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chroma_buffer.size());
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}
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} // namespace Tegra
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