shader_jit_a64_compiler: Improve Compile_SwizzleSrc (#7136)
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@ -257,28 +257,40 @@ void JitShader::Compile_SwizzleSrc(Instruction instr, unsigned src_num, SourceRe
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// Generate instructions for source register swizzling as needed
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// Generate instructions for source register swizzling as needed
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u8 sel = swiz.GetRawSelector(src_num);
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u8 sel = swiz.GetRawSelector(src_num);
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if (sel != NO_SRC_REG_SWIZZLE) {
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switch (sel) {
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case NO_SRC_REG_SWIZZLE:
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// NOP
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break;
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case 0b00'00'00'00:
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DUP(dest.S4(), dest.Selem()[0]);
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break;
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case 0b01'01'01'01:
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DUP(dest.S4(), dest.Selem()[1]);
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break;
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case 0b10'10'10'10:
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DUP(dest.S4(), dest.Selem()[2]);
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break;
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case 0b11'11'11'11:
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DUP(dest.S4(), dest.Selem()[3]);
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break;
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default: {
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const int table[] = {
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const int table[] = {
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((sel & 0b11'00'00'00) >> 6),
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((sel & 0b11'00'00'00) >> 6),
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((sel & 0b00'11'00'00) >> 4),
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((sel & 0b00'11'00'00) >> 4),
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((sel & 0b00'00'11'00) >> 2),
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((sel & 0b00'00'11'00) >> 2),
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((sel & 0b00'00'00'11) >> 0),
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((sel & 0b00'00'00'11) >> 0),
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};
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};
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MOV(VSCRATCH0.B16(), dest.B16());
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// Generate table-vector
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if (table[0] != 0)
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MOV(XSCRATCH0.toW(), u32(0x03'02'01'00u + (table[0] * 0x04'04'04'04u)));
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MOV(dest.Selem()[0], VSCRATCH0.Selem()[table[0]]);
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MOV(VSCRATCH0.Selem()[0], XSCRATCH0.toW());
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if (table[1] != 1)
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MOV(dest.Selem()[1], VSCRATCH0.Selem()[table[1]]);
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MOV(XSCRATCH0.toW(), u32(0x03'02'01'00u + (table[1] * 0x04'04'04'04u)));
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if (table[2] != 2)
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MOV(VSCRATCH0.Selem()[1], XSCRATCH0.toW());
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MOV(dest.Selem()[2], VSCRATCH0.Selem()[table[2]]);
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if (table[3] != 3)
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MOV(XSCRATCH0.toW(), u32(0x03'02'01'00u + (table[2] * 0x04'04'04'04u)));
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MOV(dest.Selem()[3], VSCRATCH0.Selem()[table[3]]);
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MOV(VSCRATCH0.Selem()[2], XSCRATCH0.toW());
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break;
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}
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MOV(XSCRATCH0.toW(), u32(0x03'02'01'00u + (table[3] * 0x04'04'04'04u)));
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MOV(VSCRATCH0.Selem()[3], XSCRATCH0.toW());
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TBL(dest.B16(), List{dest.B16()}, VSCRATCH0.B16());
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}
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}
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// If the source register should be negated, flip the negative bit using XOR
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// If the source register should be negated, flip the negative bit using XOR
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