mirror of
https://github.com/KytyPS5/KytyPS5.git
synced 2026-08-03 11:23:49 +00:00
1612 lines
66 KiB
C++
1612 lines
66 KiB
C++
#ifndef EMULATOR_INCLUDE_EMULATOR_GRAPHICS_SHADER_RECOMPILER_SPIRVEMITTER_INTERNAL_H_
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#define EMULATOR_INCLUDE_EMULATOR_GRAPHICS_SHADER_RECOMPILER_SPIRVEMITTER_INTERNAL_H_
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#include "common/common.h"
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#include "common/stringUtils.h"
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#include "graphics/shader/recompiler/BufferFormat.h"
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#include "graphics/shader/recompiler/emitter/SpirvBuilder.h"
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#include "graphics/shader/recompiler/ir/BindingLayout.h"
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#include "graphics/shader/recompiler/ir/ResourceMaterialization.h"
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#include "graphics/shader/recompiler/ir/ShaderIR.h"
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#include <algorithm>
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#include <array>
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#include <cinttypes>
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#include <cmath>
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#include <cstdlib>
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#include <cstring>
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#include <iterator>
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#include <map>
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#include <utility>
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#include <vector>
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namespace Libs::Graphics::ShaderRecompiler::Spirv::Emitter {
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enum : uint32_t {
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ExecutionModelVertex = 0,
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ExecutionModelFragment = 4,
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ExecutionModelGLCompute = 5,
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ExecutionModeOriginUpperLeft = 7,
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ExecutionModeEarlyFragmentTests = 9,
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ExecutionModeDepthReplacing = 12,
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ExecutionModeLocalSize = 17,
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ExecutionModeDerivativeGroupQuadsKHR = 5289,
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AddressingModelLogical = 0,
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MemoryModelGLSL450 = 1,
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CapabilityShader = 1,
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CapabilityImageGatherExtended = 25,
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CapabilitySampled1D = 43,
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CapabilityImage1D = 44,
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CapabilityImageQuery = 50,
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CapabilityStorageImageReadWithoutFormat = 55,
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CapabilityStorageImageWriteWithoutFormat = 56,
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CapabilityGroupNonUniform = 61,
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CapabilityGroupNonUniformBallot = 64,
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CapabilityGroupNonUniformShuffle = 65,
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CapabilityComputeDerivativeGroupQuadsKHR = 5288,
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StorageClassUniformConstant = 0,
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StorageClassInput = 1,
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StorageClassOutput = 3,
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StorageClassWorkgroup = 4,
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StorageClassFunction = 7,
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StorageClassPushConstant = 9,
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StorageClassImage = 11,
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StorageClassStorageBuffer = 12,
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FunctionControlNone = 0,
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SelectionControlNone = 0,
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LoopControlNone = 0,
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};
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enum : uint32_t {
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DecorationBlock = 2,
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DecorationBuiltIn = 11,
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DecorationNoPerspective = 13,
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DecorationFlat = 14,
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DecorationLocation = 30,
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DecorationArrayStride = 6,
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DecorationBinding = 33,
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DecorationDescriptorSet = 34,
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DecorationOffset = 35,
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};
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enum : uint32_t {
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BuiltInPosition = 0,
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BuiltInFragCoord = 15,
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BuiltInFrontFacing = 17,
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BuiltInSampleMask = 20,
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BuiltInFragDepth = 22,
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BuiltInWorkgroupId = 26,
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BuiltInLocalInvocationId = 27,
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BuiltInGlobalInvocationId = 28,
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BuiltInLocalInvocationIndex = 29,
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BuiltInSubgroupLocalInvocationId = 41,
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BuiltInVertexIndex = 42,
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BuiltInInstanceIndex = 43,
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};
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enum : uint32_t {
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Dim1D = 0,
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Dim3D = 2,
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Dim2D = 1,
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ImageFormatUnknown = 0,
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ImageFormatRgba32f = 1,
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ImageFormatR32ui = 33,
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};
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enum : uint32_t {
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ImageOperandsBiasMask = 0x00000001u,
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ImageOperandsLodMask = 0x00000002u,
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ImageOperandsGradMask = 0x00000004u,
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ImageOperandsOffsetMask = 0x00000010u,
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ImageOperandsConstOffsetsMask = 0x00000020u,
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ImageOperandsSampleMask = 0x00000040u,
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};
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enum : uint32_t {
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ScopeDevice = 1,
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ScopeWorkgroup = 2,
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ScopeSubgroup = 3,
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MemorySemanticsNone = 0,
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MemorySemanticsAcquireRelease = 0x00000008u,
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MemorySemanticsUniformMemory = 0x00000040u,
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MemorySemanticsWorkgroupMemory = 0x00000100u,
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};
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enum : uint32_t {
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OpExtInst = 12,
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OpTypeVoid = 19,
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OpTypeBool = 20,
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OpTypeInt = 21,
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OpTypeFloat = 22,
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OpTypeVector = 23,
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OpTypeImage = 25,
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OpTypeSampler = 26,
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OpTypeSampledImage = 27,
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OpTypeArray = 28,
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OpTypeRuntimeArray = 29,
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OpTypeStruct = 30,
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OpTypePointer = 32,
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OpTypeFunction = 33,
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OpConstant = 43,
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OpConstantComposite = 44,
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OpFunction = 54,
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OpFunctionEnd = 56,
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OpVariable = 59,
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OpImageTexelPointer = 60,
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OpLoad = 61,
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OpStore = 62,
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OpAccessChain = 65,
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OpArrayLength = 68,
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OpDecorate = 71,
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OpMemberDecorate = 72,
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OpVectorShuffle = 79,
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OpCompositeConstruct = 80,
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OpCompositeExtract = 81,
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OpSampledImage = 86,
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OpImageSampleImplicitLod = 87,
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OpImageSampleExplicitLod = 88,
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OpImageSampleDrefImplicitLod = 89,
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OpImageSampleDrefExplicitLod = 90,
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OpImageFetch = 95,
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OpImageGather = 96,
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OpImageDrefGather = 97,
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OpImageWrite = 99,
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OpImageQuerySizeLod = 103,
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OpImageQueryLod = 105,
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OpImageQueryLevels = 106,
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OpConvertFToU = 109,
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OpConvertFToS = 110,
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OpConvertSToF = 111,
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OpConvertUToF = 112,
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OpBitcast = 124,
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OpSNegate = 126,
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OpFNegate = 127,
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OpIAdd = 128,
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OpFAdd = 129,
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OpISub = 130,
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OpFSub = 131,
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OpIMul = 132,
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OpFMul = 133,
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OpUDiv = 134,
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OpFDiv = 136,
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OpIAddCarry = 149,
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OpUMulExtended = 151,
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OpSMulExtended = 152,
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OpLogicalNotEqual = 165,
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OpLogicalOr = 166,
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OpLogicalAnd = 167,
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OpLogicalNot = 168,
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OpSelect = 169,
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OpIEqual = 170,
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OpINotEqual = 171,
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OpUGreaterThan = 172,
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OpSGreaterThan = 173,
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OpUGreaterThanEqual = 174,
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OpSGreaterThanEqual = 175,
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OpULessThan = 176,
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OpSLessThan = 177,
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OpULessThanEqual = 178,
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OpSLessThanEqual = 179,
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OpFOrdEqual = 180,
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OpFUnordEqual = 181,
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OpFOrdNotEqual = 182,
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OpFUnordNotEqual = 183,
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OpFOrdLessThan = 184,
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OpFUnordLessThan = 185,
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OpFOrdGreaterThan = 186,
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OpFUnordGreaterThan = 187,
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OpFOrdLessThanEqual = 188,
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OpFUnordLessThanEqual = 189,
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OpFOrdGreaterThanEqual = 190,
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OpFUnordGreaterThanEqual = 191,
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OpShiftRightLogical = 194,
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OpShiftRightArithmetic = 195,
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OpShiftLeftLogical = 196,
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OpBitwiseOr = 197,
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OpBitwiseXor = 198,
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OpBitwiseAnd = 199,
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OpNot = 200,
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OpBitFieldInsert = 201,
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OpBitFieldSExtract = 202,
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OpBitFieldUExtract = 203,
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OpBitReverse = 204,
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OpBitCount = 205,
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OpControlBarrier = 224,
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OpMemoryBarrier = 225,
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OpAtomicLoad = 227,
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OpAtomicExchange = 229,
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OpAtomicCompareExchange = 230,
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OpAtomicIAdd = 234,
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OpAtomicISub = 235,
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OpAtomicSMin = 236,
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OpAtomicUMin = 237,
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OpAtomicSMax = 238,
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OpAtomicUMax = 239,
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OpAtomicAnd = 240,
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OpAtomicOr = 241,
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OpAtomicXor = 242,
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OpPhi = 245,
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OpLoopMerge = 246,
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OpSelectionMerge = 247,
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OpLabel = 248,
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OpBranch = 249,
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OpBranchConditional = 250,
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OpSwitch = 251,
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OpKill = 252,
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OpReturn = 253,
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OpGroupNonUniformBallot = 339,
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OpGroupNonUniformBallotFindLSB = 343,
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OpGroupNonUniformShuffle = 345,
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};
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enum : uint32_t {
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GlslRoundEven = 2,
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GlslTrunc = 3,
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GlslFAbs = 4,
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GlslFloor = 8,
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GlslCeil = 9,
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GlslFract = 10,
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GlslSin = 13,
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GlslCos = 14,
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GlslExp2 = 29,
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GlslLog2 = 30,
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GlslSqrt = 31,
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GlslInverseSqrt = 32,
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GlslFMin = 37,
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GlslFMax = 40,
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GlslFClamp = 43,
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GlslLdexp = 53,
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GlslFma = 50,
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GlslPackSnorm2x16 = 56,
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GlslPackUnorm2x16 = 57,
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GlslPackHalf2x16 = 58,
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GlslUnpackHalf2x16 = 62,
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GlslFindILsb = 73,
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GlslFindUMsb = 75,
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};
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struct RegisterBinding {
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IR::Register reg;
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uint32_t pointer_id = 0;
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};
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struct InputBinding {
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IR::StageInputKind kind = IR::StageInputKind::VertexIndex;
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uint32_t location = 0;
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uint32_t component_count = 1;
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uint32_t variable_id = 0;
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std::string debug_name;
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};
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struct OutputBinding {
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IR::StageOutputKind kind = IR::StageOutputKind::Parameter;
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uint32_t index = 0;
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uint32_t location = 0;
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uint32_t variable_id = 0;
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std::string debug_name;
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};
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struct DescriptorResourceBinding {
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const IR::DescriptorBinding* descriptor = nullptr;
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uint32_t array_index = 0;
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};
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struct SampledImageDescriptors {
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uint32_t image_type = 0;
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uint32_t sampled_image_type = 0;
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uint32_t pointer_type = 0;
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uint32_t array_type = 0;
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uint32_t array_pointer_type = 0;
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uint32_t variable = 0;
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};
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struct StorageImageDescriptors {
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uint32_t image_type = 0;
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uint32_t pointer_type = 0;
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uint32_t array_type = 0;
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uint32_t array_pointer_type = 0;
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uint32_t variable = 0;
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};
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struct EmitterState {
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EmitterState(const IR::Program& program_, const IR::ResourceSnapshot& resources_)
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: program(program_), resources(resources_) {}
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Builder builder;
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const IR::Program& program;
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const IR::ResourceSnapshot& resources;
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const ShaderVertexInputInfo* vertex_input_info = nullptr;
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const ShaderPixelInputInfo* pixel_input_info = nullptr;
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const ShaderComputeInputInfo* compute_input_info = nullptr;
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ShaderType stage = ShaderType::Unknown;
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uint32_t wave_size = 64;
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bool exact_subgroup_operations = false;
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bool per_invocation_masks = false;
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uint32_t void_type = 0;
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uint32_t bool_type = 0;
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uint32_t uint_type = 0;
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uint32_t uint_pair_type = 0;
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uint32_t int_pair_type = 0;
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uint32_t int_type = 0;
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uint32_t float_type = 0;
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uint32_t vec2_uint_type = 0;
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uint32_t vec3_uint_type = 0;
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uint32_t vec4_uint_type = 0;
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uint32_t vec2_int_type = 0;
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uint32_t vec3_int_type = 0;
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uint32_t vec4_int_type = 0;
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uint32_t vec2_float_type = 0;
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uint32_t vec3_float_type = 0;
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uint32_t vec4_float_type = 0;
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uint32_t ptr_func_uint = 0;
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uint32_t ptr_input_float = 0;
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uint32_t ptr_input_bool = 0;
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uint32_t ptr_input_int = 0;
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uint32_t ptr_input_uint = 0;
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uint32_t ptr_input_vec2_float = 0;
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uint32_t ptr_input_vec3_float = 0;
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uint32_t ptr_input_vec2_int = 0;
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uint32_t ptr_input_vec3_int = 0;
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uint32_t ptr_input_vec4_int = 0;
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uint32_t ptr_input_vec2_uint = 0;
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uint32_t ptr_input_vec3_uint = 0;
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uint32_t ptr_input_vec4_uint = 0;
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uint32_t ptr_input_vec4_float = 0;
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uint32_t sample_mask_array_type = 0;
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uint32_t ptr_output_int = 0;
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uint32_t ptr_output_sample_mask_array = 0;
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uint32_t ptr_output_float = 0;
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uint32_t ptr_output_vec4_float = 0;
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uint32_t per_vertex_type = 0;
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uint32_t ptr_output_per_vertex = 0;
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uint32_t storage_runtime_array_type = 0;
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uint32_t storage_buffer_type = 0;
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uint32_t ptr_storage_buffer = 0;
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uint32_t ptr_storage_buffer_uint = 0;
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uint32_t storage_buffer_array_type = 0;
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uint32_t ptr_storage_buffer_array = 0;
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uint32_t storage_buffer_variable = 0;
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std::array<uint32_t, IR::ShaderInfo::MaxBuffers> storage_buffer_offsets {};
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uint32_t address_memory_array_type = 0;
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uint32_t ptr_address_memory_array = 0;
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uint32_t address_memory_variable = 0;
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uint32_t gds_variable = 0;
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uint32_t push_constant_array_type = 0;
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uint32_t push_constant_block_type = 0;
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uint32_t ptr_push_constant_block = 0;
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uint32_t ptr_push_constant_uint = 0;
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uint32_t push_constant_variable = 0;
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uint32_t vsharp_storage_variable = 0;
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uint32_t flattened_srt_variable = 0;
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uint32_t lds_array_type = 0;
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uint32_t ptr_workgroup_array = 0;
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uint32_t ptr_workgroup_uint = 0;
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uint32_t lds_variable = 0;
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std::array<SampledImageDescriptors, 14> sampled_images;
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std::array<StorageImageDescriptors, 10> storage_images;
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uint32_t sampler_type = 0;
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uint32_t sampler_array_type = 0;
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uint32_t ptr_uniform_sampler = 0;
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uint32_t ptr_uniform_sampler_array = 0;
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uint32_t sampler_variable = 0;
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uint32_t ptr_image_uint = 0;
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uint32_t func_type = 0;
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uint32_t main_func = 0;
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uint32_t entry_label = 0;
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uint32_t pixel_valid_mask_variable = 0;
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bool dispatcher_fallback = false;
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uint32_t dispatch_pc_variable = 0;
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uint32_t dispatch_header_label = 0;
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uint32_t dispatch_select_label = 0;
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uint32_t dispatch_default_label = 0;
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uint32_t dispatch_after_switch_label = 0;
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uint32_t dispatch_continue_label = 0;
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uint32_t dispatch_merge_label = 0;
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uint32_t glsl_std450 = 0;
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uint32_t subgroup_local_invocation_id_variable = 0;
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uint32_t per_vertex_variable = 0;
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uint32_t depth_variable = 0;
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uint32_t sample_mask_variable = 0;
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bool needs_subgroup_ballot = false;
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bool needs_subgroup_shuffle = false;
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bool needs_subgroup_local_invocation_id = false;
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bool needs_compute_derivatives = false;
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bool needs_image_gather_extended = false;
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bool needs_function_lds = false;
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bool needs_pixel_valid_mask = false;
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std::vector<RegisterBinding> registers;
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std::vector<InputBinding> inputs;
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std::vector<OutputBinding> outputs;
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std::vector<uint32_t> interface_variables;
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std::vector<bool> reachable_blocks;
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std::map<uint32_t, uint32_t> block_labels;
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std::map<uint32_t, uint32_t> constants;
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std::map<uint32_t, uint32_t> signed_constants;
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std::map<uint32_t, uint32_t> float_constants;
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};
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enum class VertexInputScalarKind { Float, Sint, Uint };
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constexpr uint32_t NoImageComponent = 0xffffffffu;
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struct DppTargetLane {
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uint32_t lane = 0;
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uint32_t valid = 0;
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};
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struct ImageSampleLayout {
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uint32_t offset = NoImageComponent;
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uint32_t dref = NoImageComponent;
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uint32_t bias = NoImageComponent;
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uint32_t coord = 0;
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uint32_t lod = NoImageComponent;
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uint32_t grad_x = NoImageComponent;
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uint32_t grad_y = NoImageComponent;
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};
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enum class ImageViewKind {
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Dim1D,
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Dim1DArray,
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Dim2D,
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Dim2DArray,
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Dim3D,
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Dim2DMsaa,
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Dim2DMsaaArray,
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Count,
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};
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constexpr uint32_t SampledImageViewKindCount = static_cast<uint32_t>(ImageViewKind::Count);
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constexpr uint32_t StorageImageViewKindCount = static_cast<uint32_t>(ImageViewKind::Dim2DMsaa);
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constexpr uint32_t SampledImageIndex(bool integer, ImageViewKind view) {
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return static_cast<uint32_t>(view) + (integer ? SampledImageViewKindCount : 0u);
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}
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constexpr uint32_t StorageImageIndex(bool integer, ImageViewKind view) {
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return static_cast<uint32_t>(view) + (integer ? StorageImageViewKindCount : 0u);
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}
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constexpr IR::DescriptorBindingKind SampledBindingKind(bool integer, ImageViewKind view) {
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if (integer) {
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switch (view) {
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case ImageViewKind::Dim1D: return IR::DescriptorBindingKind::SampledUint1D;
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case ImageViewKind::Dim1DArray: return IR::DescriptorBindingKind::SampledUint1DArray;
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case ImageViewKind::Dim2D: return IR::DescriptorBindingKind::SampledUint2D;
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case ImageViewKind::Dim2DArray: return IR::DescriptorBindingKind::SampledUint2DArray;
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case ImageViewKind::Dim3D: return IR::DescriptorBindingKind::SampledUint3D;
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case ImageViewKind::Dim2DMsaa: return IR::DescriptorBindingKind::SampledUint2DMsaa;
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case ImageViewKind::Dim2DMsaaArray:
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return IR::DescriptorBindingKind::SampledUint2DMsaaArray;
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default: break;
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}
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}
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switch (view) {
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case ImageViewKind::Dim1D: return IR::DescriptorBindingKind::Sampled1D;
|
|
case ImageViewKind::Dim1DArray: return IR::DescriptorBindingKind::Sampled1DArray;
|
|
case ImageViewKind::Dim2D: return IR::DescriptorBindingKind::Sampled2D;
|
|
case ImageViewKind::Dim2DArray: return IR::DescriptorBindingKind::Sampled2DArray;
|
|
case ImageViewKind::Dim3D: return IR::DescriptorBindingKind::Sampled3D;
|
|
case ImageViewKind::Dim2DMsaa: return IR::DescriptorBindingKind::Sampled2DMsaa;
|
|
case ImageViewKind::Dim2DMsaaArray: return IR::DescriptorBindingKind::Sampled2DMsaaArray;
|
|
default: break;
|
|
}
|
|
return IR::DescriptorBindingKind::Count;
|
|
}
|
|
|
|
constexpr IR::DescriptorBindingKind StorageBindingKind(bool integer, ImageViewKind view) {
|
|
if (integer) {
|
|
switch (view) {
|
|
case ImageViewKind::Dim1D: return IR::DescriptorBindingKind::StorageUint1D;
|
|
case ImageViewKind::Dim1DArray: return IR::DescriptorBindingKind::StorageUint1DArray;
|
|
case ImageViewKind::Dim2D: return IR::DescriptorBindingKind::StorageUint2D;
|
|
case ImageViewKind::Dim2DArray: return IR::DescriptorBindingKind::StorageUint2DArray;
|
|
case ImageViewKind::Dim3D: return IR::DescriptorBindingKind::StorageUint3D;
|
|
default: break;
|
|
}
|
|
}
|
|
switch (view) {
|
|
case ImageViewKind::Dim1D: return IR::DescriptorBindingKind::Storage1D;
|
|
case ImageViewKind::Dim1DArray: return IR::DescriptorBindingKind::Storage1DArray;
|
|
case ImageViewKind::Dim2D: return IR::DescriptorBindingKind::Storage2D;
|
|
case ImageViewKind::Dim2DArray: return IR::DescriptorBindingKind::Storage2DArray;
|
|
case ImageViewKind::Dim3D: return IR::DescriptorBindingKind::Storage3D;
|
|
default: break;
|
|
}
|
|
return IR::DescriptorBindingKind::Count;
|
|
}
|
|
|
|
constexpr uint32_t ImageSpirvDimension(ImageViewKind view) {
|
|
switch (view) {
|
|
case ImageViewKind::Dim1D:
|
|
case ImageViewKind::Dim1DArray: return Dim1D;
|
|
case ImageViewKind::Dim2D:
|
|
case ImageViewKind::Dim2DArray:
|
|
case ImageViewKind::Dim2DMsaa:
|
|
case ImageViewKind::Dim2DMsaaArray:
|
|
case ImageViewKind::Count: return Dim2D;
|
|
case ImageViewKind::Dim3D: return Dim3D;
|
|
}
|
|
return Dim2D;
|
|
}
|
|
|
|
constexpr uint32_t ImageSpirvArrayed(ImageViewKind view) {
|
|
return view == ImageViewKind::Dim1DArray || view == ImageViewKind::Dim2DArray ||
|
|
view == ImageViewKind::Dim2DMsaaArray
|
|
? 1u
|
|
: 0u;
|
|
}
|
|
|
|
constexpr uint32_t ImageSpirvMultisampled(ImageViewKind view) {
|
|
return view == ImageViewKind::Dim2DMsaa || view == ImageViewKind::Dim2DMsaaArray ? 1u : 0u;
|
|
}
|
|
|
|
struct AddCarryResult {
|
|
uint32_t sum = 0;
|
|
uint32_t carry = 0;
|
|
};
|
|
|
|
struct F32Class {
|
|
uint32_t bits = 0;
|
|
uint32_t nan = 0;
|
|
uint32_t snan = 0;
|
|
uint32_t zero = 0;
|
|
uint32_t quiet_bits = 0;
|
|
};
|
|
|
|
struct CubeF32Values {
|
|
uint32_t x = 0;
|
|
uint32_t y = 0;
|
|
uint32_t z = 0;
|
|
uint32_t nx = 0;
|
|
uint32_t ny = 0;
|
|
uint32_t nz = 0;
|
|
uint32_t z_face = 0;
|
|
uint32_t y_face = 0;
|
|
uint32_t x_neg = 0;
|
|
uint32_t y_neg = 0;
|
|
uint32_t z_neg = 0;
|
|
};
|
|
|
|
struct F16Class {
|
|
uint32_t bits = 0;
|
|
uint32_t nan = 0;
|
|
uint32_t snan = 0;
|
|
uint32_t zero = 0;
|
|
uint32_t quiet_bits = 0;
|
|
};
|
|
|
|
uint32_t PixelParameterMappedLocation(const EmitterState& state, uint32_t attr);
|
|
|
|
uint32_t PixelParameterLocation(const EmitterState& state, uint32_t attr);
|
|
|
|
bool PixelParameterIsFlat(const EmitterState& state, uint32_t attr);
|
|
|
|
VertexInputScalarKind VertexParameterScalarKind(const EmitterState& state, uint32_t location);
|
|
|
|
uint32_t VertexParameterComponentCount(const EmitterState& state, const InputBinding& input);
|
|
|
|
uint32_t VertexParameterScalarType(const EmitterState& state, VertexInputScalarKind kind);
|
|
|
|
uint32_t VertexParameterScalarPointerType(const EmitterState& state, VertexInputScalarKind kind);
|
|
|
|
uint32_t VertexParameterVectorOrScalarType(const EmitterState& state, VertexInputScalarKind kind,
|
|
uint32_t components);
|
|
|
|
uint32_t VertexParameterInputPointerType(const EmitterState& state, VertexInputScalarKind kind,
|
|
uint32_t components);
|
|
|
|
void SetError(std::string* error, const char* message);
|
|
|
|
void CollectRegister(std::vector<RegisterBinding>& registers, IR::Register reg);
|
|
|
|
IR::Operand MakeRegisterOperand(IR::RegisterFile file, uint32_t index);
|
|
|
|
IR::Register SccRegister();
|
|
|
|
IR::Operand SccOperand();
|
|
|
|
bool IsInactiveWave32ExecHigh(const EmitterState& state, IR::Register reg);
|
|
|
|
bool IsMaskRegisterFile(IR::RegisterFile file);
|
|
|
|
bool IsSccOperand(const IR::Operand& operand);
|
|
|
|
bool IsCompareOpcode(IR::Opcode op);
|
|
|
|
void CollectMaskStateRegisters(std::vector<RegisterBinding>& registers);
|
|
|
|
void CollectSequentialRegisters(std::vector<RegisterBinding>& registers, const IR::Operand& base,
|
|
uint32_t count);
|
|
|
|
uint32_t MaxCollectedVectorRegisterEnd(const std::vector<RegisterBinding>& registers);
|
|
|
|
void CollectMoveRelSourceRegisters(const IR::Program& program,
|
|
std::vector<RegisterBinding>& registers);
|
|
|
|
bool IsPairDwordOpcode(IR::Opcode op);
|
|
|
|
uint32_t PairDwordSourceCount(IR::Opcode op, uint32_t src_count);
|
|
|
|
void CollectRegisters(const IR::Program& program, std::vector<RegisterBinding>& registers);
|
|
|
|
bool HasOutput(const std::vector<OutputBinding>& outputs, IR::StageOutputKind kind, uint32_t index);
|
|
|
|
void CopyProgramInputsAndOutputs(EmitterState& state, const IR::Program& program);
|
|
|
|
uint32_t OutputVariableForExport(const EmitterState& state, const IR::ExportInfo& exp);
|
|
|
|
bool ProgramNeedsComputeDerivatives(const IR::Program& program);
|
|
|
|
bool ProgramNeedsImageGatherExtended(const IR::Program& program);
|
|
|
|
bool IsLdsOpcode(IR::Opcode op);
|
|
|
|
bool ProgramNeedsFunctionLds(const IR::Program& program);
|
|
|
|
bool ProgramNeedsPixelValidMask(const IR::Program& program);
|
|
|
|
bool InstructionHasDppSource(const IR::Instruction& inst);
|
|
|
|
bool ProgramNeedsSubgroupBallot(const IR::Program& program);
|
|
|
|
bool ProgramNeedsSubgroupShuffle(const IR::Program& program);
|
|
|
|
bool IsCompareOpcode(IR::Opcode op);
|
|
|
|
bool ProgramNeedsSubgroupLocalInvocationId(const IR::Program& program);
|
|
|
|
uint32_t PointerForRegister(const EmitterState& state, IR::Register reg);
|
|
|
|
uint32_t ConstantU32(EmitterState& state, uint32_t value);
|
|
|
|
void EmitStoreU32(EmitterState& state, const IR::Operand& dst, uint32_t value);
|
|
|
|
uint32_t EmitSubgroupLocalInvocationId(EmitterState& state);
|
|
|
|
uint32_t EmitLaneIndexActiveBool(EmitterState& state, uint32_t lane);
|
|
|
|
[[noreturn]] void ExitDescriptorBindingFailure(const EmitterState& state,
|
|
IR::DescriptorBindingKind kind, uint32_t resource,
|
|
const char* reason);
|
|
|
|
DescriptorResourceBinding ResourceForDescriptor(const EmitterState& state,
|
|
IR::DescriptorBindingKind kind, uint32_t resource);
|
|
|
|
uint32_t DescriptorElementPointer(EmitterState& state, uint32_t result_ptr_type,
|
|
uint32_t variable_id, uint32_t array_index,
|
|
IR::DescriptorBindingKind kind, uint32_t resource,
|
|
const char* variable_name);
|
|
|
|
ImageViewKind SampledImageViewKind(const EmitterState& state, const IR::MemoryInfo& mem,
|
|
uint32_t use_pc);
|
|
|
|
uint32_t ImageViewCoordinateComponents(ImageViewKind view);
|
|
|
|
uint32_t ImageViewSpatialComponents(ImageViewKind view);
|
|
|
|
uint32_t ImageViewImageType(const EmitterState& state, ImageViewKind view, bool integer);
|
|
|
|
uint32_t ImageViewSampledImageType(const EmitterState& state, ImageViewKind view, bool integer);
|
|
|
|
uint32_t ImageViewSizeType(const EmitterState& state, ImageViewKind view);
|
|
|
|
uint32_t LoadSampledImageDescriptor(EmitterState& state, const IR::MemoryInfo& mem, uint32_t use_pc,
|
|
ImageViewKind view);
|
|
|
|
uint32_t LoadSamplerDescriptor(EmitterState& state, uint32_t sampler, uint32_t use_pc);
|
|
|
|
uint32_t MakeSampledImage(EmitterState& state, const IR::MemoryInfo& mem, uint32_t use_pc,
|
|
ImageViewKind view);
|
|
|
|
ImageViewKind StorageImageViewKind(const EmitterState& state, const IR::MemoryInfo& mem,
|
|
bool uint_image, uint32_t use_pc);
|
|
|
|
uint32_t StorageImageDescriptorPointer(EmitterState& state, uint32_t resource, bool uint_image,
|
|
uint32_t use_pc = UINT32_MAX,
|
|
ImageViewKind view = ImageViewKind::Dim2D);
|
|
|
|
uint32_t LoadStorageImageDescriptor(EmitterState& state, uint32_t resource, bool uint_image,
|
|
uint32_t use_pc, ImageViewKind view = ImageViewKind::Dim2D);
|
|
|
|
uint32_t ExecutionModelForStage(ShaderType stage);
|
|
|
|
uint32_t ConstantU32(EmitterState& state, uint32_t value);
|
|
|
|
uint32_t ConstantI32(EmitterState& state, int32_t value);
|
|
|
|
uint32_t ConstantF32(EmitterState& state, uint32_t bits);
|
|
|
|
uint32_t FloatBits(float value);
|
|
|
|
uint32_t ConstantF32Value(EmitterState& state, float value);
|
|
|
|
void AllocateInputVariables(EmitterState& state);
|
|
|
|
void AllocateOutputVariables(EmitterState& state);
|
|
|
|
uint32_t BuiltInForInput(IR::StageInputKind kind);
|
|
|
|
void AddInputAnnotationsAndNames(EmitterState& state);
|
|
|
|
void AddOutputAnnotationsAndNames(EmitterState& state);
|
|
|
|
void DecorateDescriptor(EmitterState& state, uint32_t variable, const char* name, uint32_t set,
|
|
uint32_t binding);
|
|
|
|
void AddDescriptorAnnotationsAndNames(EmitterState& state);
|
|
|
|
void EmitHeaderAndTypes(EmitterState& state);
|
|
|
|
void AllocateRegisterVariables(EmitterState& state);
|
|
|
|
void AllocateDescriptorVariables(EmitterState& state);
|
|
|
|
bool SdwaSelectorOffsetWidth(uint32_t sel, uint32_t& offset, uint32_t& width);
|
|
|
|
uint32_t EmitSdwaExtractU32(EmitterState& state, const IR::Operand& operand, uint32_t value);
|
|
|
|
uint32_t EmitTrueBool(EmitterState& state);
|
|
|
|
DppTargetLane EmitDppQuadPermTargetLane(EmitterState& state, uint32_t subid, uint32_t control);
|
|
|
|
DppTargetLane EmitDppRowShiftTargetLane(EmitterState& state, uint32_t subid, uint32_t amount,
|
|
bool left);
|
|
|
|
DppTargetLane EmitDppRowRotateRightTargetLane(EmitterState& state, uint32_t subid, uint32_t amount);
|
|
|
|
DppTargetLane EmitDppMirrorTargetLane(EmitterState& state, uint32_t subid, bool half_row);
|
|
|
|
DppTargetLane EmitDppTargetLane(EmitterState& state, uint32_t control);
|
|
|
|
uint32_t EmitDppValueU32(EmitterState& state, const IR::Operand& operand, uint32_t value);
|
|
|
|
uint32_t EmitValueLoad(EmitterState& state, const IR::Operand& operand);
|
|
|
|
uint32_t EmitRegisterLoad(EmitterState& state, IR::Register reg);
|
|
|
|
uint32_t WaveMaskHighLoad(EmitterState& state, IR::RegisterFile file);
|
|
|
|
uint32_t EmitLaneMaskPartU32(EmitterState& state, uint32_t part);
|
|
|
|
uint32_t EmitThreadMaskBelowPartU32(EmitterState& state, uint32_t part);
|
|
|
|
uint32_t EmitMaskActiveBool(EmitterState& state, IR::RegisterFile file);
|
|
|
|
uint32_t EmitMaskZeroBool(EmitterState& state, IR::RegisterFile file, bool zero);
|
|
|
|
uint32_t EmitMaskSummaryZeroBool(EmitterState& state, IR::RegisterFile file, bool zero);
|
|
|
|
uint32_t EmitExecActiveBool(EmitterState& state);
|
|
|
|
uint32_t EmitConditionBool(EmitterState& state, const IR::Operand& operand);
|
|
|
|
uint32_t EmitSubgroupLocalInvocationId(EmitterState& state);
|
|
|
|
uint32_t InputVariableForKind(const EmitterState& state, IR::StageInputKind kind);
|
|
|
|
uint32_t InputVariableForParameter(const EmitterState& state, uint32_t location);
|
|
|
|
uint32_t EmitInputComponentU32(EmitterState& state, IR::StageInputKind kind, uint32_t component);
|
|
|
|
uint32_t EmitLocalInvocationIndex(EmitterState& state);
|
|
|
|
void EmitLoadInputF32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
uint32_t EmitSccBool(EmitterState& state, bool non_zero);
|
|
|
|
uint32_t EmitFloatLoad(EmitterState& state, const IR::Operand& operand);
|
|
|
|
uint32_t ApplyResultModifiersF32(EmitterState& state, uint32_t value, const IR::Operand& dst);
|
|
|
|
uint32_t EmitMixF32Load(EmitterState& state, const IR::Operand& operand);
|
|
|
|
IR::Operand OffsetRegisterOperand(const IR::Operand& operand, uint32_t offset);
|
|
|
|
uint32_t EmitLaneMaskOperandActiveBool(EmitterState& state, const IR::Operand& operand);
|
|
|
|
uint32_t EmitBallotLaneActiveBool(EmitterState& state, uint32_t ballot, uint32_t lane);
|
|
|
|
uint32_t EmitLaneIndexActiveBool(EmitterState& state, uint32_t lane);
|
|
|
|
uint32_t EmitSubgroupLaneActiveBool(EmitterState& state, uint32_t lane);
|
|
|
|
uint32_t EmitSequentialValueLoad(EmitterState& state, const IR::Operand& operand, uint32_t offset);
|
|
|
|
uint32_t EmitSequentialFloatLoad(EmitterState& state, const IR::Operand& operand, uint32_t offset);
|
|
|
|
uint32_t ImageAddressHalfComponent(const IR::Instruction& inst, uint32_t component);
|
|
|
|
IR::Operand ImageAddressOperand(const IR::Instruction& inst, const IR::Operand& base,
|
|
uint32_t component);
|
|
|
|
uint32_t EmitImageAddressValueLoad(EmitterState& state, const IR::Instruction& inst,
|
|
const IR::Operand& base, uint32_t component);
|
|
|
|
uint32_t EmitImageAddressFloatLoad(EmitterState& state, const IR::Instruction& inst,
|
|
const IR::Operand& base, uint32_t component);
|
|
|
|
uint32_t EmitZeroF32(EmitterState& state);
|
|
|
|
bool HasImageSampleFlag(const IR::Instruction& inst, uint32_t flag);
|
|
|
|
ImageSampleLayout MakeImageSampleLayout(const IR::Instruction& inst, ImageViewKind view);
|
|
|
|
uint32_t EmitImageCoordF32(EmitterState& state, const IR::Instruction& inst,
|
|
const ImageSampleLayout& layout, ImageViewKind view);
|
|
|
|
uint32_t EmitImageLodF32(EmitterState& state, const IR::Instruction& inst,
|
|
const ImageSampleLayout& layout);
|
|
|
|
uint32_t EmitImageDrefF32(EmitterState& state, const IR::Instruction& inst,
|
|
const ImageSampleLayout& layout);
|
|
|
|
uint32_t EmitImageBiasF32(EmitterState& state, const IR::Instruction& inst,
|
|
const ImageSampleLayout& layout);
|
|
|
|
uint32_t EmitImageGradientF32(EmitterState& state, const IR::Instruction& inst,
|
|
uint32_t first_component, ImageViewKind view);
|
|
|
|
uint32_t EmitImagePackedOffsetI32(EmitterState& state, const IR::Instruction& inst,
|
|
const ImageSampleLayout& layout, ImageViewKind view);
|
|
|
|
uint32_t EmitImageCoordU32(EmitterState& state, const IR::Instruction& inst,
|
|
ImageViewKind view = ImageViewKind::Dim2D);
|
|
|
|
uint32_t EmitImageLoadCoordU32(EmitterState& state, const IR::Instruction& inst,
|
|
ImageViewKind view);
|
|
|
|
uint32_t EmitImageMipLodU32(EmitterState& state, const IR::Instruction& inst,
|
|
const IR::Operand& address, ImageViewKind view);
|
|
|
|
uint32_t EmitImageQueryCoordF32(EmitterState& state, const IR::Instruction& inst,
|
|
ImageViewKind view);
|
|
|
|
uint32_t DmaskComponentIndex(uint32_t dmask, uint32_t component);
|
|
|
|
uint32_t EmitImageStoreComponentF32(EmitterState& state, const IR::Instruction& inst,
|
|
uint32_t component);
|
|
|
|
uint32_t EmitImageStoreTexelF32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
uint32_t EmitImageStoreTexelU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
uint32_t EmitDppWriteActiveBool(EmitterState& state, const IR::Operand& dst);
|
|
|
|
uint32_t EmitSdwaDestinationMerge(EmitterState& state, uint32_t pointer, const IR::Operand& dst,
|
|
uint32_t value);
|
|
|
|
void EmitStoreU32(EmitterState& state, const IR::Operand& dst, uint32_t value);
|
|
|
|
uint32_t EmitAddU32(EmitterState& state, uint32_t lhs, uint32_t rhs);
|
|
|
|
uint32_t EmitBinaryU32(EmitterState& state, uint32_t opcode, uint32_t lhs, uint32_t rhs);
|
|
|
|
uint32_t EmitNotEqualZeroBool(EmitterState& state, uint32_t value);
|
|
|
|
uint32_t EmitSelectU32Value(EmitterState& state, uint32_t condition, uint32_t true_value,
|
|
uint32_t false_value);
|
|
|
|
uint32_t EmitShaderDataDwordLoad(EmitterState& state, uint32_t dword_index);
|
|
|
|
uint32_t EmitByteAddress(EmitterState& state, const IR::Instruction& inst, uint32_t first_src,
|
|
uint32_t src_count);
|
|
|
|
uint32_t StorageBufferPackedStride(const EmitterState& state, const IR::MemoryInfo& mem,
|
|
uint32_t use_pc);
|
|
|
|
uint32_t StorageBufferFormat(const EmitterState& state, const IR::MemoryInfo& mem, uint32_t use_pc);
|
|
|
|
bool ShouldApplyBufferAddTid(const IR::Instruction& inst);
|
|
|
|
uint32_t EmitBufferIndexWithAddTid(EmitterState& state, const IR::Instruction& inst, uint32_t index,
|
|
uint32_t packed);
|
|
|
|
uint32_t EmitOptionalLogicalAndBool(EmitterState& state, uint32_t lhs, uint32_t rhs);
|
|
|
|
bool IsStorageBufferMemoryKind(IR::ResourceKind kind);
|
|
|
|
void EmitStorageBufferOffsets(EmitterState& state);
|
|
|
|
uint32_t EmitBufferAddressFromParts(EmitterState& state, const IR::Instruction& inst,
|
|
uint32_t index, uint32_t offset, uint32_t soffset);
|
|
|
|
uint32_t EmitBufferByteAddress(EmitterState& state, const IR::Instruction& inst, uint32_t first_src,
|
|
uint32_t src_count);
|
|
|
|
uint32_t EmitMemoryByteAddress(EmitterState& state, const IR::Instruction& inst,
|
|
const IR::MemoryInfo& mem, uint32_t first_src, uint32_t src_count);
|
|
|
|
uint32_t EmitDwordIndex(EmitterState& state, const IR::Instruction& inst, uint32_t first_src,
|
|
uint32_t src_count);
|
|
|
|
uint32_t EmitMemoryDwordIndex(EmitterState& state, const IR::Instruction& inst,
|
|
const IR::MemoryInfo& mem, uint32_t first_src, uint32_t src_count);
|
|
|
|
DescriptorResourceBinding StorageBufferBindingForMemory(EmitterState& state,
|
|
const IR::MemoryInfo& mem, uint32_t use_pc);
|
|
|
|
uint32_t EmitStorageBufferObjectPointer(EmitterState& state, const IR::MemoryInfo& mem,
|
|
uint32_t use_pc);
|
|
|
|
uint32_t EmitStorageBufferElementInBounds(EmitterState& state, const IR::MemoryInfo& mem,
|
|
uint32_t index, uint32_t use_pc);
|
|
|
|
uint32_t EmitStorageBufferElementPointer(EmitterState& state, const IR::MemoryInfo& mem,
|
|
uint32_t index, uint32_t use_pc);
|
|
|
|
uint32_t EmitLdsElementPointer(EmitterState& state, uint32_t index);
|
|
|
|
uint32_t EmitGdsElementInBounds(EmitterState& state, uint32_t index);
|
|
|
|
uint32_t EmitGdsElementPointer(EmitterState& state, uint32_t index);
|
|
|
|
uint32_t EmitMemoryElementPointer(EmitterState& state, const IR::MemoryInfo& mem, uint32_t index,
|
|
uint32_t use_pc);
|
|
|
|
uint32_t EmitMemoryLoadDwordValueU32(EmitterState& state, const IR::Instruction& inst,
|
|
IR::ResourceKind kind, uint32_t first_src, uint32_t src_count);
|
|
|
|
void EmitMemoryLoadU32(EmitterState& state, const IR::Instruction& inst, IR::ResourceKind kind,
|
|
uint32_t first_src, uint32_t src_count);
|
|
|
|
uint32_t EmitMemoryLoadSubDwordValueU32(EmitterState& state, const IR::Instruction& inst,
|
|
IR::ResourceKind kind, uint32_t first_src,
|
|
uint32_t src_count, uint32_t data_bits, bool sign_extend);
|
|
|
|
void EmitMemoryLoadSubDwordU32(EmitterState& state, const IR::Instruction& inst,
|
|
IR::ResourceKind kind, uint32_t first_src, uint32_t src_count,
|
|
uint32_t data_bits, bool sign_extend);
|
|
|
|
void EmitMemoryStoreU32(EmitterState& state, const IR::Instruction& inst, IR::ResourceKind kind,
|
|
uint32_t first_src, uint32_t src_count);
|
|
|
|
void EmitMemoryStoreSubDwordU32(EmitterState& state, const IR::Instruction& inst,
|
|
IR::ResourceKind kind, uint32_t first_src, uint32_t src_count,
|
|
uint32_t data_bits);
|
|
|
|
uint32_t AddressSourceCount(const IR::Instruction& inst, uint32_t first_src);
|
|
|
|
bool IsFormattedBufferComponent(const IR::Instruction& inst);
|
|
|
|
Prospero::BufferFormat FormattedBufferFormat(const EmitterState& state,
|
|
const IR::Instruction& inst);
|
|
|
|
IR::Instruction WithFormatComponentByteOffset(const IR::Instruction& inst,
|
|
Prospero::BufferFormat format);
|
|
|
|
uint32_t EmitTBufferBitcastF32ToU32(EmitterState& state, uint32_t value);
|
|
|
|
uint32_t EmitTBufferBitcastU32ToF32(EmitterState& state, uint32_t value);
|
|
|
|
uint32_t EmitTBufferBitcastU32ToI32(EmitterState& state, uint32_t value);
|
|
|
|
uint32_t EmitTBufferCompareU32Constant(EmitterState& state, uint32_t opcode, uint32_t value,
|
|
uint32_t constant);
|
|
|
|
uint32_t EmitTBufferSelectF32(EmitterState& state, uint32_t condition, uint32_t true_value,
|
|
uint32_t false_value);
|
|
|
|
bool IsSignedFormatComponent(Format::ComponentType type);
|
|
|
|
uint32_t EmitExtractFormatFieldU32(EmitterState& state, uint32_t raw_word, uint32_t offset,
|
|
uint32_t bits, bool sign_extend);
|
|
|
|
uint32_t EmitHalfToF32Bits(EmitterState& state, uint32_t raw);
|
|
|
|
uint32_t EmitUFloatToF32Bits(EmitterState& state, uint32_t raw, uint32_t bits);
|
|
|
|
uint32_t EmitFormatRawComponent(EmitterState& state, const IR::Instruction& inst,
|
|
const Format::BufferFormatInfo& info);
|
|
|
|
uint32_t NormalizeFormatComponent(EmitterState& state, const Format::BufferFormatInfo& info,
|
|
uint32_t component, uint32_t raw);
|
|
|
|
uint32_t UnpackTBufferFormat(EmitterState& state, const IR::Instruction& inst,
|
|
const Format::BufferFormatInfo& info);
|
|
|
|
uint32_t FormattedBufferDwordStoreComponentCount(Prospero::BufferFormat format,
|
|
uint32_t opcode_components);
|
|
|
|
bool EmitBufferIntegerFormatStore(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
uint32_t EmitAtomicPointer(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitDeviceAtomicMemoryBarrier(EmitterState& state);
|
|
|
|
void EmitAtomicU32(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
|
|
|
|
void EmitSLoadDword(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitLoadSrtDword(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitBufferLoadUbyte(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitBufferLoadSbyte(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitBufferLoadUshort(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitBufferLoadSshort(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitBufferLoadDword(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitBufferLoadDwordGroup(EmitterState& state, const IR::Instruction* instructions,
|
|
uint32_t count);
|
|
|
|
void EmitBufferStoreDword(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitFlatLoadUbyte(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitFlatLoadSbyte(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitFlatLoadUshort(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitFlatLoadSshort(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitFlatLoadDword(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
uint32_t EmitDsAddtidDwordIndex(EmitterState& state, const IR::Instruction& inst,
|
|
uint32_t m0_src_index);
|
|
|
|
void EmitDsWriteAddtidB32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitDsReadAddtidB32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitDsAppendConsume(EmitterState& state, const IR::Instruction& inst, uint32_t atomic_opcode);
|
|
|
|
void EmitDsFloatMinMaxF32(EmitterState& state, const IR::Instruction& inst, bool max_value);
|
|
|
|
uint32_t EmitDsSwizzleTargetLane(EmitterState& state, uint32_t subid, uint32_t control);
|
|
|
|
void EmitDsSwizzleB32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
uint32_t EmitImageGetResinfoComponent(EmitterState& state, uint32_t image, uint32_t size,
|
|
uint32_t component_index);
|
|
|
|
void EmitImageGetResinfo(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitImageGetLod(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitImageLoad(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitImageStore(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitImageSampleResult(EmitterState& state, const IR::Instruction& inst, uint32_t sample,
|
|
bool dref);
|
|
|
|
bool ImageSampleNeedsExplicitLod(const EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void AddImageSampleOperands(EmitterState& state, const IR::Instruction& inst,
|
|
const ImageSampleLayout& layout, bool explicit_lod,
|
|
std::vector<uint32_t>& words);
|
|
|
|
uint32_t ImageSampleOpcode(const EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitImageSample(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
uint32_t ImageGatherComponent(uint32_t dmask);
|
|
|
|
void EmitImageGather4(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitMoveU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitMoveF32Bits(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
uint32_t MoveRelRegisterLimit(const EmitterState& state, IR::Register base);
|
|
|
|
void EmitMoveRelSourceU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitMoveRelDestU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitMoveU64(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
uint32_t EmitWqmLaneU32(EmitterState& state, uint32_t src);
|
|
|
|
void EmitWqmB64(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitSaveexecB32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitSaveexecB64(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitReadFirstLaneU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
uint32_t EmitLaneIndex(EmitterState& state, const IR::Operand& operand);
|
|
|
|
void EmitReadLaneU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitWriteLaneU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitPermlaneB32(EmitterState& state, const IR::Instruction& inst, bool x16);
|
|
|
|
void EmitControlNop(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitWaitcnt(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitBarrier(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitAbsI32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitUnaryU32(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
|
|
|
|
void EmitUnaryU64(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
|
|
|
|
void EmitFindLsbU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitFindMsbFromHighU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitFindMsbFromHighU64(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitBitCountU64(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitBitCountU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitBitCountAddU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitBinaryU32(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
|
|
|
|
void EmitBinaryNotRhsU32(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
|
|
|
|
void EmitBinaryThenNotU32(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
|
|
|
|
void EmitMaskedBitCountU32(EmitterState& state, const IR::Instruction& inst, uint32_t exec_index);
|
|
|
|
uint32_t EmitMask5U32(EmitterState& state, uint32_t value);
|
|
|
|
void EmitChainedBinaryU32(EmitterState& state, const IR::Instruction& inst, uint32_t first_op,
|
|
uint32_t second_op, bool mask_first_rhs = false,
|
|
bool mask_second_rhs = false);
|
|
|
|
void EmitBinaryU64(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
|
|
|
|
void EmitBinaryNotRhsU64(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
|
|
|
|
void EmitBinaryThenNotU64(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
|
|
|
|
void EmitSelectU64(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
uint32_t EmitSelectValueU32(EmitterState& state, uint32_t cond, uint32_t true_value,
|
|
uint32_t false_value);
|
|
|
|
void EmitStoreSccBool(EmitterState& state, uint32_t cond);
|
|
|
|
uint32_t EmitAndConstant(EmitterState& state, uint32_t value, uint32_t mask);
|
|
|
|
void EmitShiftLeftLogicalU64Values(EmitterState& state, uint32_t low, uint32_t high, uint32_t shift,
|
|
uint32_t& out_low, uint32_t& out_high);
|
|
|
|
void EmitShiftLeftLogicalU64(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitShiftRightLogicalU64Values(EmitterState& state, uint32_t low, uint32_t high,
|
|
uint32_t shift, uint32_t& out_low, uint32_t& out_high);
|
|
|
|
void EmitShiftRightLogicalU64(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitAdd3U32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
uint32_t EmitAndConstant(EmitterState& state, uint32_t value, uint32_t mask);
|
|
|
|
void EmitShiftU32(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
|
|
|
|
uint32_t EmitU16LaneBits(EmitterState& state, const IR::Operand& operand, bool high_lane,
|
|
bool sign_extend = false);
|
|
|
|
void EmitShiftU16(EmitterState& state, const IR::Instruction& inst, uint32_t opcode,
|
|
bool arithmetic);
|
|
|
|
void EmitBinaryU16(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
|
|
|
|
void EmitMinMaxU16(EmitterState& state, const IR::Instruction& inst, bool signed_value,
|
|
bool max_value);
|
|
|
|
uint32_t EmitXorConstant(EmitterState& state, uint32_t value, uint32_t mask);
|
|
|
|
AddCarryResult EmitAddCarryValues(EmitterState& state, uint32_t lhs, uint32_t rhs,
|
|
uint32_t carry_in);
|
|
|
|
void EmitLaneMaskPairFromBool(EmitterState& state, const IR::Operand& dst, uint32_t value_bool);
|
|
|
|
void EmitPerInvocationMask(EmitterState& state, const IR::Operand& dst, uint32_t value_bool);
|
|
|
|
void EmitIAddCarryU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitISubBorrowU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitScalarAddCarryU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitScalarSubBorrowU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitScalarSubBorrowCarryU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitBitClearU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitBitSetU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitUMadU64U32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitScalarSignedOverflowI32(EmitterState& state, const IR::Instruction& inst, bool subtract);
|
|
|
|
void EmitScalarShiftLeftAddCarryU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitMulU24U32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitMulI24U32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitMulHighU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitMulHighI32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitMadU32U24(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitMadI32I24(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
uint32_t EmitShiftLeftConstant(EmitterState& state, uint32_t value, uint32_t shift);
|
|
|
|
uint32_t EmitShiftRightConstant(EmitterState& state, uint32_t value, uint32_t shift);
|
|
|
|
uint32_t EmitOrU32(EmitterState& state, uint32_t lhs, uint32_t rhs);
|
|
|
|
uint32_t EmitBitReplicateHalfU32(EmitterState& state, uint32_t value);
|
|
|
|
void EmitBitReplicateB64B32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
uint32_t EmitBitFieldExtractConstant(EmitterState& state, uint32_t value, uint32_t offset,
|
|
uint32_t count);
|
|
|
|
uint32_t EmitRightAlignedMaskU32(EmitterState& state, uint32_t count);
|
|
|
|
void EmitBitFieldMaskU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitRightAlignedMaskU64(EmitterState& state, uint32_t count, uint32_t& out_low,
|
|
uint32_t& out_high);
|
|
|
|
void EmitBitFieldMaskU64(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitBitFieldExtractU64(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitBitFieldExtractU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitBitFieldExtract3U32(EmitterState& state, const IR::Instruction& inst, bool signed_value);
|
|
|
|
void EmitBitFieldInsertSelectU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitAlignBitU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitSelectU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitSelectMaskU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitSelectF32Bits(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitSelectMaskF32Bits(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitPackU16(EmitterState& state, const IR::Instruction& inst, bool high_src0, bool high_src1);
|
|
|
|
void EmitPackU8F32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitBinaryF32(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
|
|
|
|
void EmitLdexpF32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
uint32_t EmitCompareU32Constant(EmitterState& state, uint32_t opcode, uint32_t value,
|
|
uint32_t constant);
|
|
|
|
uint32_t EmitSubConstantMinusU32(EmitterState& state, uint32_t constant, uint32_t value);
|
|
|
|
uint32_t EmitF32ToF16RtzBits(EmitterState& state, uint32_t f32);
|
|
|
|
void EmitPackF32ToF16Rtz(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitPackNormalizedF32(EmitterState& state, const IR::Instruction& inst, uint32_t ext_inst);
|
|
|
|
uint32_t EmitMinMaxU32Value(EmitterState& state, uint32_t lhs, uint32_t rhs, bool max_value);
|
|
|
|
void EmitMinMaxU32(EmitterState& state, const IR::Instruction& inst, bool max_value);
|
|
|
|
void EmitSadU32(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
uint32_t EmitMinMaxI32Value(EmitterState& state, uint32_t lhs, uint32_t rhs, bool max_value);
|
|
|
|
void EmitMinMaxI32(EmitterState& state, const IR::Instruction& inst, bool max_value);
|
|
|
|
void EmitMinMax3U32(EmitterState& state, const IR::Instruction& inst, bool signed_value,
|
|
bool max_value);
|
|
|
|
void EmitMed3U32(EmitterState& state, const IR::Instruction& inst, bool signed_value);
|
|
|
|
uint32_t EmitBitcastF32ToU32(EmitterState& state, uint32_t value);
|
|
|
|
uint32_t EmitBitcastU32ToF32(EmitterState& state, uint32_t value);
|
|
|
|
uint32_t EmitAndU32(EmitterState& state, uint32_t lhs, uint32_t rhs);
|
|
|
|
uint32_t EmitLogicalAndBool(EmitterState& state, uint32_t lhs, uint32_t rhs);
|
|
|
|
uint32_t EmitLogicalOrBool(EmitterState& state, uint32_t lhs, uint32_t rhs);
|
|
|
|
uint32_t EmitLogicalNotBool(EmitterState& state, uint32_t value);
|
|
|
|
F32Class EmitClassifyF32(EmitterState& state, uint32_t value);
|
|
|
|
uint32_t EmitClassMaskBitMatch(EmitterState& state, uint32_t mask, uint32_t bit,
|
|
uint32_t class_match);
|
|
|
|
uint32_t EmitClassMaskF32(EmitterState& state, uint32_t value, uint32_t mask);
|
|
|
|
uint32_t EmitMinMaxF32Value(EmitterState& state, uint32_t lhs, uint32_t rhs, bool max_value);
|
|
|
|
void EmitMinMaxF32(EmitterState& state, const IR::Instruction& inst, bool max_value);
|
|
|
|
void EmitCompareResult(EmitterState& state, const IR::Operand& dst, uint32_t cond);
|
|
|
|
void EmitCompareU32(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
|
|
|
|
void EmitCompareU16(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
|
|
|
|
void EmitCompareI16(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
|
|
|
|
void EmitBitCompareB32(EmitterState& state, const IR::Instruction& inst, bool bit_set);
|
|
|
|
void EmitCompareNeU64(EmitterState& state, const IR::Instruction& inst);
|
|
|
|
void EmitCompareConstant(EmitterState& state, const IR::Instruction& inst, bool value);
|
|
|
|
void EmitCompareMaskU32(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
|
|
|
|
void EmitCompareF32(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
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void EmitCompareOrderedF32(EmitterState& state, const IR::Instruction& inst, bool ordered);
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void EmitCompareClassF32(EmitterState& state, const IR::Instruction& inst);
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void EmitCompareMaskF32(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
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void EmitConvertU32ToF32(EmitterState& state, const IR::Instruction& inst);
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void EmitConvertI32ToF32(EmitterState& state, const IR::Instruction& inst);
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uint32_t EmitTruncF32Value(EmitterState& state, uint32_t value);
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void EmitConvertF32ToU32(EmitterState& state, const IR::Instruction& inst);
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void EmitConvertF32ToI32(EmitterState& state, const IR::Instruction& inst);
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void EmitConvertF32ToF16(EmitterState& state, const IR::Instruction& inst);
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void EmitConvertF16ToF32(EmitterState& state, const IR::Instruction& inst);
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void EmitConvertU16ToF16(EmitterState& state, const IR::Instruction& inst);
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void EmitConvertF16ToU16(EmitterState& state, const IR::Instruction& inst);
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void EmitConvertI16ToF16(EmitterState& state, const IR::Instruction& inst);
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void EmitConvertF16ToI16(EmitterState& state, const IR::Instruction& inst);
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void EmitConvertRoundPlusInfF32ToI32(EmitterState& state, const IR::Instruction& inst);
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void EmitConvertFloorF32ToI32(EmitterState& state, const IR::Instruction& inst);
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void EmitConvertI4ToOffsetF32(EmitterState& state, const IR::Instruction& inst);
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void EmitConvertByteU32ToF32(EmitterState& state, const IR::Instruction& inst);
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uint32_t EmitFlushF32DenormToSignedZero(EmitterState& state, uint32_t value);
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void EmitRcpF32(EmitterState& state, const IR::Instruction& inst);
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uint32_t EmitTrigCycleF32(EmitterState& state, uint32_t src, bool preserve_signed_zero);
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void EmitFloatExtInst(EmitterState& state, const IR::Instruction& inst, uint32_t ext_inst,
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bool scale_by_two_pi = false, bool flush_denorm = false);
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void EmitMadF32(EmitterState& state, const IR::Instruction& inst);
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uint32_t EmitFNegateValue(EmitterState& state, uint32_t value);
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uint32_t EmitFAbsValue(EmitterState& state, uint32_t value);
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uint32_t EmitFCompareValue(EmitterState& state, uint32_t opcode, uint32_t lhs, uint32_t rhs);
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uint32_t EmitLogicalAndValue(EmitterState& state, uint32_t lhs, uint32_t rhs);
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uint32_t EmitFSelectValue(EmitterState& state, uint32_t cond, uint32_t true_value,
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uint32_t false_value);
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uint32_t EmitFMulConstant(EmitterState& state, uint32_t value, uint32_t bits);
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CubeF32Values EmitCubeF32Values(EmitterState& state, const IR::Instruction& inst);
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uint32_t EmitCubeIdF32(EmitterState& state, const CubeF32Values& cube);
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uint32_t EmitCubeScF32(EmitterState& state, const CubeF32Values& cube);
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uint32_t EmitCubeTcF32(EmitterState& state, const CubeF32Values& cube);
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uint32_t EmitCubeMaF32(EmitterState& state, const CubeF32Values& cube);
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void EmitCubeF32(EmitterState& state, const IR::Instruction& inst);
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void EmitDot2AccF32F16(EmitterState& state, const IR::Instruction& inst);
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uint32_t EmitPackedF16Lane(EmitterState& state, const IR::Operand& operand, bool high_lane);
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void EmitCompareF16(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
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uint32_t EmitPackedF16LaneBits(EmitterState& state, const IR::Operand& operand, bool high_lane);
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uint32_t EmitF16BitsToF32(EmitterState& state, uint32_t bits);
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uint32_t EmitPackLowF32ToF16Bits(EmitterState& state, uint32_t value);
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void EmitPackB32F16(EmitterState& state, const IR::Instruction& inst);
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F16Class EmitClassifyF16Bits(EmitterState& state, uint32_t value);
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uint32_t EmitNegativeNumericF16Bool(EmitterState& state, const F16Class& cls);
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uint32_t EmitRcpF16Bits(EmitterState& state, uint32_t bits);
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uint32_t EmitSqrtF16Bits(EmitterState& state, uint32_t bits);
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uint32_t EmitRsqF16Bits(EmitterState& state, uint32_t bits);
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uint32_t EmitLog2F16Bits(EmitterState& state, uint32_t bits);
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uint32_t EmitExp2F16Bits(EmitterState& state, uint32_t bits);
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void EmitSpecialF16(EmitterState& state, const IR::Instruction& inst);
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void EmitBinaryF16(EmitterState& state, const IR::Instruction& inst, uint32_t opcode);
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void EmitFmaF16(EmitterState& state, const IR::Instruction& inst);
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uint32_t EmitMinMaxF16Bits(EmitterState& state, uint32_t lhs, uint32_t rhs, bool max_value);
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void EmitMinMaxF16(EmitterState& state, const IR::Instruction& inst, bool max_value);
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uint32_t EmitMinMax3F16Bits(EmitterState& state, uint32_t src0, uint32_t src1, uint32_t src2,
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bool max_value);
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void EmitMinMax3F16(EmitterState& state, const IR::Instruction& inst, bool max_value);
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uint32_t EmitF16BitsEqualBool(EmitterState& state, uint32_t lhs, uint32_t rhs);
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uint32_t EmitAnyNanF16Bool(EmitterState& state, uint32_t src0, uint32_t src1, uint32_t src2);
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void EmitMed3F16(EmitterState& state, const IR::Instruction& inst);
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uint32_t EmitPackedMinMaxF16(EmitterState& state, const IR::Instruction& inst, bool max_value);
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uint32_t EmitPackedF16BinaryLane(EmitterState& state, const IR::Instruction& inst, bool high_lane,
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uint32_t opcode);
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uint32_t EmitPackedF16FmaLane(EmitterState& state, const IR::Instruction& inst, bool high_lane);
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void EmitPackedF16(EmitterState& state, const IR::Instruction& inst);
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void EmitPackedInteger16(EmitterState& state, const IR::Instruction& inst);
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void EmitMadMixF16(EmitterState& state, const IR::Instruction& inst);
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void EmitMinMax3F32(EmitterState& state, const IR::Instruction& inst, bool max_value);
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void EmitMed3F32(EmitterState& state, const IR::Instruction& inst);
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uint32_t EmitExportComponentF32(EmitterState& state, const IR::Instruction& inst,
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uint32_t component);
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uint32_t EmitExportVec4F32(EmitterState& state, const IR::Instruction& inst);
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bool ExportWritesData(const IR::Instruction& inst);
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void EmitExport(EmitterState& state, const IR::Instruction& inst);
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bool ExportUsesPixelValidMask(const EmitterState& state, const IR::Instruction& inst);
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void EmitKillIfBoolFalse(EmitterState& state, uint32_t active);
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void EmitUpdatePixelValidMask(EmitterState& state);
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void EmitKillIfPixelValidMaskInactive(EmitterState& state);
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void ComputeReachableBlocks(EmitterState& state, const IR::Program& program);
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void AllocateBlockLabels(EmitterState& state, const IR::Program& program);
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void AllocateDispatcherState(EmitterState& state, const IR::Program& program);
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uint32_t BlockLabel(const EmitterState& state, uint32_t block_id);
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uint32_t EmitBranchCondition(EmitterState& state, CFG::BranchCondition condition);
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void EmitStructuredPrefix(EmitterState& state, const CFG::Terminator& term);
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void EmitReturn(EmitterState& state);
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void EmitTerminator(EmitterState& state, const CFG::Terminator& term);
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uint32_t InitialRegisterValue(const EmitterState& state, IR::Register reg);
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void EmitRegisterVariables(EmitterState& state);
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void EmitComputeInputRegisters(EmitterState& state);
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void EmitPixelInputRegisters(EmitterState& state);
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void EmitInstruction(EmitterState& state, const IR::Instruction& inst);
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uint32_t DispatcherTargetValue(EmitterState& state, uint32_t block_id);
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void EmitDispatcherStoreTarget(EmitterState& state, uint32_t block_id);
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void EmitDispatcherExit(EmitterState& state);
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void EmitDispatcherTerminator(EmitterState& state, const CFG::Terminator& term);
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void EmitDispatcherSwitch(EmitterState& state, const IR::Program& program);
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void EmitDispatcherBlocks(EmitterState& state, const IR::Program& program);
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void EmitDispatcherLoopTail(EmitterState& state);
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void EmitDispatcherFunction(EmitterState& state, const IR::Program& program);
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void EmitFunction(EmitterState& state, const IR::Program& program);
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|
// These templates accept local lambdas from several emitter translation units.
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|
template <typename Fn>
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|
void EmitIfCondition(EmitterState& state, uint32_t condition, Fn&& fn) {
|
|
if (condition == 0) {
|
|
fn();
|
|
return;
|
|
}
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|
const auto then_label = state.builder.AllocateId();
|
|
const auto merge_label = state.builder.AllocateId();
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|
state.builder.AddFunction({OpSelectionMerge, merge_label, SelectionControlNone});
|
|
state.builder.AddFunction({OpBranchConditional, condition, then_label, merge_label});
|
|
state.builder.AddFunction({OpLabel, then_label});
|
|
fn();
|
|
state.builder.AddFunction({OpBranch, merge_label});
|
|
state.builder.AddFunction({OpLabel, merge_label});
|
|
}
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|
template <typename Fn>
|
|
uint32_t EmitValueOrZeroIfCondition(EmitterState& state, uint32_t condition, Fn&& fn) {
|
|
if (condition == 0) {
|
|
return fn();
|
|
}
|
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|
|
const auto then_label = state.builder.AllocateId();
|
|
const auto else_label = state.builder.AllocateId();
|
|
const auto merge_label = state.builder.AllocateId();
|
|
state.builder.AddFunction({OpSelectionMerge, merge_label, SelectionControlNone});
|
|
state.builder.AddFunction({OpBranchConditional, condition, then_label, else_label});
|
|
state.builder.AddFunction({OpLabel, then_label});
|
|
const auto then_value = fn();
|
|
state.builder.AddFunction({OpBranch, merge_label});
|
|
state.builder.AddFunction({OpLabel, else_label});
|
|
state.builder.AddFunction({OpBranch, merge_label});
|
|
state.builder.AddFunction({OpLabel, merge_label});
|
|
const auto value = state.builder.AllocateId();
|
|
state.builder.AddFunction(
|
|
{OpPhi, state.uint_type, value, then_value, then_label, ConstantU32(state, 0), else_label});
|
|
return value;
|
|
}
|
|
|
|
template <typename Fn>
|
|
void EmitGuardedByExec(EmitterState& state, Fn&& fn) {
|
|
const auto then_label = state.builder.AllocateId();
|
|
const auto merge_label = state.builder.AllocateId();
|
|
const auto condition = EmitExecActiveBool(state);
|
|
state.builder.AddFunction({OpSelectionMerge, merge_label, SelectionControlNone});
|
|
state.builder.AddFunction({OpBranchConditional, condition, then_label, merge_label});
|
|
state.builder.AddFunction({OpLabel, then_label});
|
|
fn();
|
|
state.builder.AddFunction({OpBranch, merge_label});
|
|
state.builder.AddFunction({OpLabel, merge_label});
|
|
}
|
|
|
|
} // namespace Libs::Graphics::ShaderRecompiler::Spirv::Emitter
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|
#endif /* EMULATOR_INCLUDE_EMULATOR_GRAPHICS_SHADER_RECOMPILER_SPIRVEMITTER_INTERNAL_H_ */
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